From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DE1B1ED23 for ; Thu, 13 Jul 2023 15:22:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4638C433C8; Thu, 13 Jul 2023 15:22:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1689261764; bh=uN7K7q3d88UmPKrqGcaLwp33I70fOLahFeC3QAY1Qac=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=QKB2PgZ6baDCdEjmkiCfnPciiucOhc5ZVrLfqWShB6nWo2S3tVIFgcGZ29l8hUy8M Ga29wux46lKzOBXFFC44WH6WhEsj5/TqUIsJpzgTSyceMdbsvoQY1QddKYyTaNMuAu Qgv65dvRSDWDrU6B0kZe8drubEnSQfsbGkJrGcmryc5tH0Nkz4E/LGNaP8IeLLGYio N7eXQ2Z3RJS6IQP+PsLvxIUxkf7RqaQBgJV97X+H8CMG27EjsJMr4jhF8tW9Q2ZIRK YBZ+SIapUorQGV91xu55byMgHyKo56WKN7fVe0WlKSKmct3xbjCr+zZj0vjZ/F/Qoj QXfesuloTig2g== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qJy9R-00CqVA-IX; Thu, 13 Jul 2023 16:22:41 +0100 Date: Thu, 13 Jul 2023 16:22:41 +0100 Message-ID: <86ttu7vnsu.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: Suzuki K Poulose , Oliver Upton , James Morse , Zenghui Yu , Catalin Marinas , Will Deacon , Joey Gouly , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Subject: Re: [PATCH v5 2/2] KVM: arm64: Move FGT value configuration to vCPU state In-Reply-To: <9dedca62-7821-461f-805f-9550b17efd48@sirena.org.uk> References: <20230712-kvm-arm64-fgt-v5-0-dae3ec236288@kernel.org> <20230712-kvm-arm64-fgt-v5-2-dae3ec236288@kernel.org> <740731b6-5f3f-7acd-6d9f-8adfcef833ab@arm.com> <9dedca62-7821-461f-805f-9550b17efd48@sirena.org.uk> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: broonie@kernel.org, suzuki.poulose@arm.com, oliver.upton@linux.dev, james.morse@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 13 Jul 2023 16:15:36 +0100, Mark Brown wrote: > > [1 ] > On Thu, Jul 13, 2023 at 10:48:54AM +0100, Suzuki K Poulose wrote: > > On 12/07/2023 13:50, Mark Brown wrote: > > > > + /* We currently assume the host configuration never changes */ > > > + vcpu->arch.hfgrtr_el2_host = read_sysreg_s(SYS_HFGRTR_EL2); > > > + vcpu->arch.hfgwtr_el2_host = read_sysreg_s(SYS_HFGWTR_EL2); > > > Doesn't this crash an nVHE host ? > > This series is probably moot given Marc's nv series (or at least needs > another rework) but could you expand on the issue you're seeing please? You're reading EL2 registers from EL1. What could possibly go wrong? M. -- Without deviation from the norm, progress is not possible. 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b=QKB2PgZ6baDCdEjmkiCfnPciiucOhc5ZVrLfqWShB6nWo2S3tVIFgcGZ29l8hUy8M Ga29wux46lKzOBXFFC44WH6WhEsj5/TqUIsJpzgTSyceMdbsvoQY1QddKYyTaNMuAu Qgv65dvRSDWDrU6B0kZe8drubEnSQfsbGkJrGcmryc5tH0Nkz4E/LGNaP8IeLLGYio N7eXQ2Z3RJS6IQP+PsLvxIUxkf7RqaQBgJV97X+H8CMG27EjsJMr4jhF8tW9Q2ZIRK YBZ+SIapUorQGV91xu55byMgHyKo56WKN7fVe0WlKSKmct3xbjCr+zZj0vjZ/F/Qoj QXfesuloTig2g== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qJy9R-00CqVA-IX; Thu, 13 Jul 2023 16:22:41 +0100 Date: Thu, 13 Jul 2023 16:22:41 +0100 Message-ID: <86ttu7vnsu.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: Suzuki K Poulose , Oliver Upton , James Morse , Zenghui Yu , Catalin Marinas , Will Deacon , Joey Gouly , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Subject: Re: [PATCH v5 2/2] KVM: arm64: Move FGT value configuration to vCPU state In-Reply-To: <9dedca62-7821-461f-805f-9550b17efd48@sirena.org.uk> References: <20230712-kvm-arm64-fgt-v5-0-dae3ec236288@kernel.org> <20230712-kvm-arm64-fgt-v5-2-dae3ec236288@kernel.org> <740731b6-5f3f-7acd-6d9f-8adfcef833ab@arm.com> <9dedca62-7821-461f-805f-9550b17efd48@sirena.org.uk> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: broonie@kernel.org, suzuki.poulose@arm.com, oliver.upton@linux.dev, james.morse@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230713_082245_551368_CC29FD0D X-CRM114-Status: GOOD ( 15.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 13 Jul 2023 16:15:36 +0100, Mark Brown wrote: > > [1 ] > On Thu, Jul 13, 2023 at 10:48:54AM +0100, Suzuki K Poulose wrote: > > On 12/07/2023 13:50, Mark Brown wrote: > > > > + /* We currently assume the host configuration never changes */ > > > + vcpu->arch.hfgrtr_el2_host = read_sysreg_s(SYS_HFGRTR_EL2); > > > + vcpu->arch.hfgwtr_el2_host = read_sysreg_s(SYS_HFGWTR_EL2); > > > Doesn't this crash an nVHE host ? > > This series is probably moot given Marc's nv series (or at least needs > another rework) but could you expand on the issue you're seeing please? You're reading EL2 registers from EL1. What could possibly go wrong? M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel