From: Marc Zyngier <maz@kernel.org>
To: Zenghui Yu <zenghui.yu@linux.dev>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com,
wanghaibin.wang@huawei.com
Subject: Re: [PATCH] KVM: arm64: nv: Return correct RES0 bits for FGT registers
Date: Thu, 22 Jan 2026 09:07:47 +0000 [thread overview]
Message-ID: <86wm1aaucc.wl-maz@kernel.org> (raw)
In-Reply-To: <20260121101631.41037-1-zenghui.yu@linux.dev>
On Wed, 21 Jan 2026 10:16:31 +0000,
Zenghui Yu <zenghui.yu@linux.dev> wrote:
>
> From: "Zenghui Yu (Huawei)" <zenghui.yu@linux.dev>
>
> We had extended the sysreg masking infrastructure to more general
> registers, instead of restricting it to VNCR-backed registers, since
> commit a0162020095e ("KVM: arm64: Extend masking facility to arbitrary
> registers"). Fix kvm_get_sysreg_res0() to reflect this fact.
Huh, what a howler! Thanks a lot for spotting this!
>
> Note that we're sure that we only deal with FGT registers in
> kvm_get_sysreg_res0(), the
>
> if (sr < __VNCR_START__)
>
> is actually a never false, which should probably be removed later.
I think the biggest mistake is to have several places where we perform
sysreg index to array index conversions. We should try to unify that.
>
> Fixes: 69c19e047dfe ("KVM: arm64: Add TCR2_EL2 to the sysreg arrays")
> Signed-off-by: Zenghui Yu (Huawei) <zenghui.yu@linux.dev>
Cc: stable@vger.kernel.org
Thanks again,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2026-01-22 9:07 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-21 10:16 [PATCH] KVM: arm64: nv: Return correct RES0 bits for FGT registers Zenghui Yu
2026-01-22 9:07 ` Marc Zyngier [this message]
2026-01-22 9:11 ` Marc Zyngier
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