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Mon, 17 Nov 2025 14:51:35 +0000 Date: Mon, 17 Nov 2025 14:51:35 +0000 Message-ID: <86wm3osoeg.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, Joey Gouly , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH 11/12] KVM: arm64: nv: Implement HW access flag management in stage-2 SW PTW In-Reply-To: <20251112183406.2118981-12-oupton@kernel.org> References: <20251112183406.2118981-1-oupton@kernel.org> <20251112183406.2118981-12-oupton@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oupton@kernel.org, kvmarm@lists.linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 12 Nov 2025 18:34:05 +0000, Oliver Upton wrote: > > Give the stage-2 walk similar treatment to stage-1: update the access > flag during the table walk and do so for any walk context. > > Signed-off-by: Oliver Upton > --- > arch/arm64/kvm/mmu.c | 3 +++ > arch/arm64/kvm/nested.c | 46 ++++++++++++++++++++++++++++++++++------- > 2 files changed, 41 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > index 96f1786c72fe..b23d3dc8865e 100644 > --- a/arch/arm64/kvm/mmu.c > +++ b/arch/arm64/kvm/mmu.c > @@ -2012,6 +2012,9 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu) > u32 esr; > > ret = kvm_walk_nested_s2(vcpu, fault_ipa, &nested_trans); > + if (ret == -EAGAIN) > + return 1; > + > if (ret) { > esr = kvm_s2_trans_esr(&nested_trans); > kvm_inject_s2_fault(vcpu, esr); > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c > index b2fb3d7c9c19..7293769dacf5 100644 > --- a/arch/arm64/kvm/nested.c > +++ b/arch/arm64/kvm/nested.c > @@ -124,13 +124,14 @@ int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu) > } > > struct s2_walk_info { > - void *data; > - u64 baddr; > - unsigned int max_oa_bits; > - unsigned int pgshift; > - unsigned int sl; > - unsigned int t0sz; > - bool be; > + void *data; > + u64 baddr; > + unsigned int max_oa_bits; > + unsigned int pgshift; > + unsigned int sl; > + unsigned int t0sz; > + bool be; > + bool ha; > }; > > static u32 compute_fsc(int level, u32 fsc) > @@ -220,6 +221,22 @@ static int read_guest_s2_desc(phys_addr_t pa, u64 *desc, struct s2_walk_info *wi > return 0; > } > > +static int swap_guest_s2_desc(phys_addr_t pa, u64 old, u64 new, > + struct s2_walk_info *wi) > +{ > + struct kvm_vcpu *vcpu = wi->data; > + > + if (wi->be) { > + old = cpu_to_be64(old); > + new = cpu_to_be64(new); > + } else { > + old = cpu_to_be64(old); > + new = cpu_to_be64(new); > + } > + > + return __kvm_at_swap_desc(vcpu->kvm, pa, old, new); > +} > + > /* > * This is essentially a C-version of the pseudo code from the ARM ARM > * AArch64.TranslationTableWalk function. I strongly recommend looking at > @@ -233,7 +250,7 @@ static int walk_nested_s2_pgd(phys_addr_t ipa, > int first_block_level, level, stride, input_size, base_lower_bound; > phys_addr_t base_addr; > unsigned int addr_top, addr_bottom; > - u64 desc; /* page table entry */ > + u64 desc, new_desc; /* page table entry */ > int ret; > phys_addr_t paddr; > > @@ -326,6 +343,17 @@ static int walk_nested_s2_pgd(phys_addr_t ipa, > return 1; > } > > + if (wi->ha) > + new_desc |= KVM_PTE_LEAF_ATTR_LO_S2_AF; Same issue here (new_desc not initialised). Thanks, M. -- Without deviation from the norm, progress is not possible.