From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6702818784B; Tue, 10 Sep 2024 09:00:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725958851; cv=none; b=atNvoCSWdcCieF9sWTPTr97hNtm5b2WEAbTRccEvVyAKwSta2kaQ9np5gr5JddRMMEdLxiu4StPDCqhWnstB4GZK5VcX9VlZn7LEJN5vqn8tJCYSIU6xprTg6LSu44Jut4mjsBSYu46dKOAeLb56HWDisETpivFCot+7vpJWn4w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725958851; c=relaxed/simple; bh=71rfz1s67YzT+RLcc8Z5sytb/FLjGZKI4TF20Wfm914=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=bRE3ZWf+/UogmMs1VqNbWS8ktRFDfqVSIe6WzyaR2s5f2D9DMFdt4yu9EVVo4y07yA8Prh7okpxzaHbkpL0fDOHYJKSXXTS39sfDi5u9mUsUOUOJIfoWZGPZFCAfq7c3uTf9J0VKj97oP0mntV7gH0z5rMnTxB9gxHN565rNObc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ENuYQyGp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ENuYQyGp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E2AB5C4CEC3; Tue, 10 Sep 2024 09:00:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1725958850; bh=71rfz1s67YzT+RLcc8Z5sytb/FLjGZKI4TF20Wfm914=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=ENuYQyGp9cpvi8OnGYy5irDliRneRaJaGyVm9tUwo+LEn370faXEJw2y19TAtlfvI f+AMb93sgYAyHkNEVFXGEt2dCJI6LPDpOc/HMqUYrydbULCmr9SwB8i+yjtP1W0xdh rP0slUO6MiEfYOs/OdmKBh+HrA/5J1iIEZEekGROLZ6dDdx2boZtWkM9/QqUZdww7B REmassKjGe/1+HsQsNZLQgWUYDJFE8z5H/c1tcvv+WQqC6ILonnHqwEJjMzhPS1Tyw MFWC8ogjuiXh+SmsfBTUFxrJjQvP0h1inqeMqecUh27Oajr5EON2KATeVWDOrEIoxb su7uGfpc3pekg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1snwjw-00BfZi-JD; Tue, 10 Sep 2024 10:00:48 +0100 Date: Tue, 10 Sep 2024 10:00:48 +0100 Message-ID: <86wmjj7uin.wl-maz@kernel.org> From: Marc Zyngier To: Shameerali Kolothum Thodi Cc: Oliver Upton , "kvmarm@lists.linux.dev" , Sebastian Ott , James Morse , Suzuki K Poulose , yuzenghui , "kvm@vger.kernel.org" , Shaoqin Huang , Eric Auger , "Wangzhou (B)" Subject: Re: [PATCH v5 07/10] KVM: arm64: Treat CTR_EL0 as a VM feature ID register In-Reply-To: <6abe14d969da42638d648db205d39fe7@huawei.com> References: <20240619174036.483943-1-oliver.upton@linux.dev> <20240619174036.483943-8-oliver.upton@linux.dev> <0db19a081d9e41f08b0043baeef16f16@huawei.com> <864j6o94fz.wl-maz@kernel.org> <8e361ab82d6c4adcb15890cd3cab48ee@huawei.com> <6abe14d969da42638d648db205d39fe7@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: shameerali.kolothum.thodi@huawei.com, oliver.upton@linux.dev, kvmarm@lists.linux.dev, sebott@redhat.com, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, kvm@vger.kernel.org, shahuang@redhat.com, eric.auger@redhat.com, wangzhou1@hisilicon.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 10 Sep 2024 08:16:49 +0100, Shameerali Kolothum Thodi wrote: >=20 > And now to the elephant in the room, handling MIDR differences and associ= ated errata > management =F0=9F=98=8A >=20 > Marc, you mentioned about a prototype solution you have a while back[0], > has that been shared public? Nah, and I didn't have any time to get back to it. But maybe that's a KVM Forum hackathon project! To be honest, this has little to do with KVM itself. It is mostly guest enlightenment and a bit of infrastructure to communicate the constraints back to the guest. > Also not sure ARM has any plans to make this a specification soon. Probably not until we come up with a decent prototype that solves the problem. > I was thinking of handling this in userspace for now by ignoring the MIDR= write > error on Migration and keeping the host MIDR value for destination VM. Th= is is > for use cases where we know that the hosts doesn't have any MIDR based er= rata or > errata difference doesn't matter and assuming the user knows what they ar= e doing. If you know of *any* host that doesn't have errata to be mitigated in the guest, send it to me, and I'll find you one pretty quickly! :D But yes, you can always play that game (which is what I do for big-little by letting the guest migrating between CPU types). But it is ultimately doomed. > Please let me know, if there are any other suggestions or work in progres= s on this one. I don't have much free time at the moment, but I'll do what I can. Thanks, M. --=20 Without deviation from the norm, progress is not possible.