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Wed, 09 Sep 2026 10:48:59 +0000 Date: Wed, 09 Sep 2026 11:48:58 +0100 Message-ID: <86zexq3dk5.wl-maz@kernel.org> From: Marc Zyngier To: Kohei Enju Cc: Suzuki K Poulose , kvm@vger.kernel.org, kvmarm@lists.linux.dev, will@kernel.org, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, steven.price@arm.com, aneesh.kumar@kernel.org, oupton@kernel.org, gshan@redhat.com, joey.gouly@arm.com, tabba@google.com, yuzenghui@huawei.com, linux-coco@lists.linux.dev, gankulkarni@os.amperecomputing.com, sdonthineni@nvidia.com, alpergun@google.com, fj0570is@fujitsu.com, WeiLin.Chang@arm.com, lpieralisi@kernel.org Subject: Re: [PATCH v17 06/20] KVM: arm64: CCA: Add a new mode for supporting Realm guests In-Reply-To: References: <20260908162223.1683432-1-suzuki.poulose@arm.com> <20260908162223.1683432-7-suzuki.poulose@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: enju.kohei@fujitsu.com, suzuki.poulose@arm.com, kvm@vger.kernel.org, kvmarm@lists.linux.dev, will@kernel.org, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, steven.price@arm.com, aneesh.kumar@kernel.org, oupton@kernel.org, gshan@redhat.com, joey.gouly@arm.com, tabba@google.com, yuzenghui@huawei.com, linux-coco@lists.linux.dev, gankulkarni@os.amperecomputing.com, sdonthineni@nvidia.com, alpergun@google.com, fj0570is@fujitsu.com, WeiLin.Chang@arm.com, lpieralisi@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 09 Sep 2026 04:26:41 +0100, Kohei Enju wrote: > > Hi Suzuki, > > On 09/08 17:22, Suzuki K Poulose wrote: > > Add an explicit mode to support Arm CCA guests. > > > > Signed-off-by: Suzuki K Poulose > > --- > > Documentation/admin-guide/kernel-parameters.txt | 3 +++ > > arch/arm64/include/asm/kvm_host.h | 1 + > > arch/arm64/kvm/arm.c | 5 +++++ > > 3 files changed, 9 insertions(+) > > > > diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt > > index 68647ff4bdd24..1afe3df3b923e 100644 > > --- a/Documentation/admin-guide/kernel-parameters.txt > > +++ b/Documentation/admin-guide/kernel-parameters.txt > > @@ -3256,6 +3256,9 @@ Kernel parameters > > nested: VHE-based mode with support for nested > > virtualization. Requires at least ARMv8.4 > > hardware (with FEAT_NV2). > > + rmm: Support for running confidential guests in Realm > > + world using RMM, as defined by Arm Confidential > > + Compute Architecture (CCA) > > > > Defaults to VHE/nVHE based on hardware support. Setting > > mode to "protected" will disable kexec and hibernation > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > > index b2e99c5cb1cd3..31ae9d8d8e92f 100644 > > --- a/arch/arm64/include/asm/kvm_host.h > > +++ b/arch/arm64/include/asm/kvm_host.h > > @@ -69,6 +69,7 @@ enum kvm_mode { > > KVM_MODE_DEFAULT, > > KVM_MODE_PROTECTED, > > KVM_MODE_NV, > > + KVM_MODE_RMM, > > KVM_MODE_NONE, > > }; > > #ifdef CONFIG_KVM > > diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c > > index 9af3bbb2f8c24..50f0adfadab38 100644 > > --- a/arch/arm64/kvm/arm.c > > +++ b/arch/arm64/kvm/arm.c > > @@ -3264,6 +3264,11 @@ static int __init early_kvm_mode_cfg(char *arg) > > return 0; > > } > > > > + if (strcmp(arg, "rmm") == 0 && !WARN_ON(!is_kernel_in_hyp_mode())) { > > + kvm_mode = KVM_MODE_RMM; > > + return 0; > > + } > > Does this make NV support and CCA Realm VM support mutually exclusive? > > Until the v16 series, we could run Realm VMs with: > 'kvm-arm.mode=nested' > > As far as the AArch64 architecture is concerned, there does not seem to > be a reason to make them mutually exclusive. I am therefore wondering > whether this restriction is intentional. I have a hack somewhere that will allow this, but this requires to change the above to be a capability mask rather than a simple enumeration. I'll see if I can spin that as a separate series. M. -- Without deviation from the norm, progress is not possible.