From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A319B1547CE for ; Sat, 9 Nov 2024 12:02:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731153760; cv=none; b=X5jeA+OWbZMT1QkEMGjTIsDHTi6RsNbqQyujoHSHkxreUszQPj/MA0Z03wf13s0HZhTwYu1QfjrhCI/9asF0GKsyohNX5t9RgtohJt6aODsReVK7NUP7FVW1oIwavP7Ri7bH1BkU9rj/4wTpz0717toOT3mpJHTEzJNPjVt1MlE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731153760; c=relaxed/simple; bh=RrGMGlTTQJBPQObxreSdp9P+8C7T8hnZDUoT0Ig1KWs=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=fDToKjcU9GjDgC0smQtKFTOVJZtEGdOkQUvRQ4mnQFDuXpdlovZKRdQHGqo4ZDEn2N0Y0vm9IfDMLuSl4/nkWtKF5Lub0DMj/Jf1kLQAOR+og8Bz0bYSHJ1n1qPq1eiAS+4JUWsLusISs9atO8kzZygCDVQ5dCA3WkcGxsgFsXQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fhy4C44n; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fhy4C44n" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6B194C4CECE; Sat, 9 Nov 2024 12:02:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731153760; bh=RrGMGlTTQJBPQObxreSdp9P+8C7T8hnZDUoT0Ig1KWs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=fhy4C44nlcmBZR9XtlZtbDjS26fgFAEkYBXv3K4rZaNns65ptLUFPuPAP8wP3fAAs xm3KSZ5HOp441BV7TO9AvEyf88wya3ZGI1BPEOnNHMseh3oYlCcbF09ZYtTNuZpMnS QFG8M5Y9CcXfei5hrFJ9XY8eD/KUAOSodGDlHmQoYZjEqvLhECE3e0vm2b2cX0aYnU 5d+WBQ5JIwgq+Q5MZ4jsgmq4MKf+ut8hcT03ITDAhlRyErGSdj2dzxuDd3UqZ0sUdY YaxyidrsbhHnwkK+F4wNrOfVWsxGJbHEMyzqSO3WNTocf03ImsrDhM60+S52xbXV3/ xGp7Of6ZjN4sA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1t9kAo-00BPUV-9j; Sat, 09 Nov 2024 12:02:38 +0000 Date: Sat, 09 Nov 2024 12:02:37 +0000 Message-ID: <86zfm8zkbm.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, Joey Gouly , Suzuki K Poulose , Zenghui Yu , Mingwei Zhang , Colton Lewis , Alexandru Elisei Subject: Re: [PATCH 09/15] KVM: arm64: Remove debug tracepoints In-Reply-To: <20241108222418.1677420-10-oliver.upton@linux.dev> References: <20241108222418.1677420-1-oliver.upton@linux.dev> <20241108222418.1677420-10-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, mizhang@google.com, coltonlewis@google.com, alexandru.elisei@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 08 Nov 2024 22:24:13 +0000, Oliver Upton wrote: > > The debug tracepoints are a useless firehose of information that track > implementation detail rather than well-defined events. These are going > to be rather difficult to uphold now that the implementation is getting > redone, so throw them out instead of bending over backwards. > > Signed-off-by: Oliver Upton > --- > arch/arm64/kvm/debug.c | 29 ----------------------------- > 1 file changed, 29 deletions(-) > > diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c > index c2bf1b296b14..66cf4e843b47 100644 > --- a/arch/arm64/kvm/debug.c > +++ b/arch/arm64/kvm/debug.c > @@ -35,10 +35,6 @@ static void save_guest_debug_regs(struct kvm_vcpu *vcpu) > u64 val = vcpu_read_sys_reg(vcpu, MDSCR_EL1); > > vcpu->arch.guest_debug_preserved.mdscr_el1 = val; > - > - trace_kvm_arm_set_dreg32("Saved MDSCR_EL1", > - vcpu->arch.guest_debug_preserved.mdscr_el1); > - > vcpu->arch.guest_debug_preserved.pstate_ss = > (*vcpu_cpsr(vcpu) & DBG_SPSR_SS); > } > @@ -49,9 +45,6 @@ static void restore_guest_debug_regs(struct kvm_vcpu *vcpu) > > vcpu_write_sys_reg(vcpu, val, MDSCR_EL1); > > - trace_kvm_arm_set_dreg32("Restored MDSCR_EL1", > - vcpu_read_sys_reg(vcpu, MDSCR_EL1)); > - > if (vcpu->arch.guest_debug_preserved.pstate_ss) > *vcpu_cpsr(vcpu) |= DBG_SPSR_SS; > else > @@ -102,8 +95,6 @@ static void kvm_arm_setup_mdcr_el2(struct kvm_vcpu *vcpu) > !vcpu_get_flag(vcpu, DEBUG_DIRTY) || > kvm_vcpu_os_lock_enabled(vcpu)) > vcpu->arch.mdcr_el2 |= MDCR_EL2_TDA; > - > - trace_kvm_arm_set_dreg32("MDCR_EL2", vcpu->arch.mdcr_el2); > } > > /** > @@ -201,8 +192,6 @@ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) > vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1); > } > > - trace_kvm_arm_set_dreg32("SPSR_EL2", *vcpu_cpsr(vcpu)); > - > /* > * HW Breakpoints and watchpoints > * > @@ -220,14 +209,6 @@ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) > vcpu->arch.debug_ptr = &vcpu->arch.external_debug_state; > vcpu_set_flag(vcpu, DEBUG_DIRTY); > > - trace_kvm_arm_set_regset("BKPTS", get_num_brps(), > - &vcpu->arch.debug_ptr->dbg_bcr[0], > - &vcpu->arch.debug_ptr->dbg_bvr[0]); > - > - trace_kvm_arm_set_regset("WAPTS", get_num_wrps(), > - &vcpu->arch.debug_ptr->dbg_wcr[0], > - &vcpu->arch.debug_ptr->dbg_wvr[0]); > - > /* > * The OS Lock blocks debug exceptions in all ELs when it is > * enabled. If the guest has enabled the OS Lock, constrain its > @@ -253,8 +234,6 @@ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) > /* Write mdcr_el2 changes since vcpu_load on VHE systems */ > if (has_vhe() && orig_mdcr_el2 != vcpu->arch.mdcr_el2) > write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); > - > - trace_kvm_arm_set_dreg32("MDSCR_EL1", vcpu_read_sys_reg(vcpu, MDSCR_EL1)); > } > > void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) > @@ -282,14 +261,6 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) > */ > if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) { > kvm_arm_reset_debug_ptr(vcpu); > - > - trace_kvm_arm_set_regset("BKPTS", get_num_brps(), > - &vcpu->arch.debug_ptr->dbg_bcr[0], > - &vcpu->arch.debug_ptr->dbg_bvr[0]); > - > - trace_kvm_arm_set_regset("WAPTS", get_num_wrps(), > - &vcpu->arch.debug_ptr->dbg_wcr[0], > - &vcpu->arch.debug_ptr->dbg_wvr[0]); > } > } > } Whilst you're at it, how about: diff --git a/arch/arm64/kvm/trace_handle_exit.h b/arch/arm64/kvm/trace_handle_exit.h index 064a58c19f481..fa1e48a36d3f9 100644 --- a/arch/arm64/kvm/trace_handle_exit.h +++ b/arch/arm64/kvm/trace_handle_exit.h @@ -101,26 +101,6 @@ TRACE_EVENT(kvm_arm_set_dreg32, TRACE_DEFINE_SIZEOF(__u64); -TRACE_EVENT(kvm_arm_set_regset, - TP_PROTO(const char *type, int len, __u64 *control, __u64 *value), - TP_ARGS(type, len, control, value), - TP_STRUCT__entry( - __field(const char *, name) - __field(int, len) - __array(u64, ctrls, 16) - __array(u64, values, 16) - ), - TP_fast_assign( - __entry->name = type; - __entry->len = len; - memcpy(__entry->ctrls, control, len << 3); - memcpy(__entry->values, value, len << 3); - ), - TP_printk("%d %s CTRL:%s VALUE:%s", __entry->len, __entry->name, - __print_array(__entry->ctrls, __entry->len, sizeof(__u64)), - __print_array(__entry->values, __entry->len, sizeof(__u64))) -); - TRACE_EVENT(trap_reg, TP_PROTO(const char *fn, int reg, bool is_write, u64 write_value), TP_ARGS(fn, reg, is_write, write_value), It's not like we're going to miss that. Thanks, M. -- Without deviation from the norm, progress is not possible.