From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FF651F3FC6; Wed, 2 Jul 2025 19:48:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751485736; cv=none; b=JrnJjRV1jku54xQn/ePaI80RjTRKK5rbI/7LYTmnjibII7tyDAfCvn2ybRJd9qi3tZoN2l9V7QT9IzJ99fyyz+AXg60u5KW8E1YHe4bqoFOWVG68+9LyxTujiHq+iwGntZgZhZUVHdwTqGqQKRssjS30MDD0zgsvRtvh75mNimk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751485736; c=relaxed/simple; bh=JGNR93gvtGkrpmmNjDuK/i9jolve4ZqTyZwa9pmtb6Y=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=H7WYOc/irqtlx58IIrh/hL9lSJt+ZYYjB7xiGMXMMSPwcgcB6lNQOt+e6uBOE4yFHSMG5CM/v4M7RJmxryLY2Gqu0v0cAokcvL4AdmvmxXa1Wg3aojYPNL0khl16bWvJ6AnGsHl8pg4sCuPYUg/Ff5ODD7OOq72fSDWmwJY6ZQw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Wu1IOp6C; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=9q+FwSv3; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Wu1IOp6C"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="9q+FwSv3" From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1751485730; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=gtg8I9VJThVmsyZdxQvLxh1iCecNQnK7i75deA60sMU=; b=Wu1IOp6CAnr71Ttqor/QQE8OnhKSMKAwvIW4S00WfbiAC6t2vTRNWH2zTyw/TZmq+EPBOC f8b4XeNDR6KzO+CZ33g6OW2iA30krerlB41xDwT0FlYAn9WKw/xdDdOJey7wQYj3thWK4r uPJ2dPyPvjsoeVTiqnqzJdlmAtJhfc/LKRMuCf4e6D1s+icwy+BcUmtJOygZsGA09fB8oZ Ezu/uBDhfmL0YVP28G9brqtunLKDJ1tadAN+E8nWAr0ChMZgGz+BTLdBeM5m/rhEAfI7N7 2VJ8LHbmDNPoZcX3NWtcMqOE0SnBu8IskYcjUhnAhlvRWAWts44yUod9NPjbYQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1751485730; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=gtg8I9VJThVmsyZdxQvLxh1iCecNQnK7i75deA60sMU=; b=9q+FwSv3rnTapDv314sP95E6GfsCIOz4brMU7S3/vB+Xe2yHlr2EtLSbYvWIpMqgxGX4It cmjMSl58LJm4azBw== To: Anup Patel , Jonathan Corbet Cc: Anup Patel , Atish Patra , Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Andrew Jones , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: Re: [PATCH v3] irqchip/riscv-imsic: Add kernel parameter to disable IPIs In-Reply-To: <20250702122434.1514328-1-apatel@ventanamicro.com> References: <20250702122434.1514328-1-apatel@ventanamicro.com> Date: Wed, 02 Jul 2025 21:48:49 +0200 Message-ID: <871pqyl6fy.ffs@tglx> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Wed, Jul 02 2025 at 17:54, Anup Patel wrote: > #include > #include ^^^ Neither in tip/irq/drivers nor in Linus tree ... patching file drivers/irqchip/irq-riscv-imsic-early.c Hunk #1 FAILED at 9. > #include > +#include > #include > #include > #include > @@ -22,6 +23,14 @@ > #include "irq-riscv-imsic-state.h" > > static int imsic_parent_irq; > +bool imsic_noipi; __ro_after_init? No? Thanks, tglx From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04259C77B7C for ; Wed, 2 Jul 2025 19:49:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:References :In-Reply-To:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ELH8VEsWrZhsz0znxWm6NLQLx6WGbe63V+jgkzs9Hj4=; b=Y/d8sS4yO8tNxh yQ3Lht2/Vw5liLbwKB9APMoajjWqdAkZri3YkIFYFPw63BlF0wWkreQVQo7mZuccOMn5BAgKPTOiQ FaD52RzfuFseARK3QrWpQA2A041KqYdHjKm/1bukrU1bLUU6ORyvElG3JRsTSbH/9TnxlpIxmLIHy AXm3R5+eKQbrgBAoQyz06e4E2FCeKVdBidmPDwryeF03TXJqxGLHOdhJcZ/IWTOsEosse1jW+zEmQ n2WQOTsYiS89xxoBHDsmW7XxGcECRvK8EEZ8sy2R9EcjbXvG93p3mTPPghP1kig9UmdF8yGYVnqkz b5dODoJtxacj3qJaHAag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uX3Ru-00000009Qzt-1ysd; Wed, 02 Jul 2025 19:48:54 +0000 Received: from galois.linutronix.de ([193.142.43.55]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uX3Rs-00000009QzX-0OPQ for linux-riscv@lists.infradead.org; Wed, 02 Jul 2025 19:48:53 +0000 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1751485730; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=gtg8I9VJThVmsyZdxQvLxh1iCecNQnK7i75deA60sMU=; b=Wu1IOp6CAnr71Ttqor/QQE8OnhKSMKAwvIW4S00WfbiAC6t2vTRNWH2zTyw/TZmq+EPBOC f8b4XeNDR6KzO+CZ33g6OW2iA30krerlB41xDwT0FlYAn9WKw/xdDdOJey7wQYj3thWK4r uPJ2dPyPvjsoeVTiqnqzJdlmAtJhfc/LKRMuCf4e6D1s+icwy+BcUmtJOygZsGA09fB8oZ Ezu/uBDhfmL0YVP28G9brqtunLKDJ1tadAN+E8nWAr0ChMZgGz+BTLdBeM5m/rhEAfI7N7 2VJ8LHbmDNPoZcX3NWtcMqOE0SnBu8IskYcjUhnAhlvRWAWts44yUod9NPjbYQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1751485730; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=gtg8I9VJThVmsyZdxQvLxh1iCecNQnK7i75deA60sMU=; b=9q+FwSv3rnTapDv314sP95E6GfsCIOz4brMU7S3/vB+Xe2yHlr2EtLSbYvWIpMqgxGX4It cmjMSl58LJm4azBw== To: Anup Patel , Jonathan Corbet Cc: Anup Patel , Atish Patra , Palmer Dabbelt , Paul Walmsley , Alexandre Ghiti , Andrew Jones , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel Subject: Re: [PATCH v3] irqchip/riscv-imsic: Add kernel parameter to disable IPIs In-Reply-To: <20250702122434.1514328-1-apatel@ventanamicro.com> References: <20250702122434.1514328-1-apatel@ventanamicro.com> Date: Wed, 02 Jul 2025 21:48:49 +0200 Message-ID: <871pqyl6fy.ffs@tglx> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250702_124852_268687_A8F9092E X-CRM114-Status: UNSURE ( 5.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Jul 02 2025 at 17:54, Anup Patel wrote: > #include > #include ^^^ Neither in tip/irq/drivers nor in Linus tree ... patching file drivers/irqchip/irq-riscv-imsic-early.c Hunk #1 FAILED at 9. > #include > +#include > #include > #include > #include > @@ -22,6 +23,14 @@ > #include "irq-riscv-imsic-state.h" > > static int imsic_parent_irq; > +bool imsic_noipi; __ro_after_init? No? Thanks, tglx _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv