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Wed, 18 Jun 2025 19:57:11 +0000 From: Rasmus Villemoes To: Tom Rini Cc: u-boot@lists.denx.de Subject: Re: failsafe update of bootloader on am335x In-Reply-To: <20250618142717.GE6521@bill-the-cat> (Tom Rini's message of "Wed, 18 Jun 2025 08:27:17 -0600") References: <87a565z21c.fsf@prevas.dk> <20250618142717.GE6521@bill-the-cat> Date: Wed, 18 Jun 2025 21:57:09 +0200 Message-ID: <871prgzuui.fsf@prevas.dk> User-Agent: Gnus/5.13 (Gnus v5.13) Content-Type: text/plain X-ClientProxiedBy: MM0P280CA0077.SWEP280.PROD.OUTLOOK.COM (2603:10a6:190:8::20) To AS5PR10MB8243.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:681::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS5PR10MB8243:EE_|PA1PR10MB9177:EE_ X-MS-Office365-Filtering-Correlation-Id: 1905b3e9-e8f8-4101-cdaf-08ddaea25037 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|366016|52116014|376014|1800799024|7053199007|38350700014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?nAahsTlXJC+LRfrJ29xKtW6NIvgs8C+0cefeXcUBSYQQEM+YIKuu9LaSEtpd?= =?us-ascii?Q?W620B7RoALd5MQMXmzbhiGT1UOX48qJxiY+lwlIm5cLAQrULF2jAJYLk4b/u?= =?us-ascii?Q?9VXGUusjp5d59RxOrx26A0G/PYNI99UMnj2MHixJMRj8Yrb4VCvcWgW4XlDH?= =?us-ascii?Q?BqQmHg4hHEveCIQs0cpMeQ8+H9n76P4Mqb4tY8m1jkPW9jCdWXEfYLFaaoXj?= =?us-ascii?Q?hMYB48qUbWowgIqGrzQIuG8z8Hzjl9CRpgfy+7aRis5MKp58v/qS0QdrwnY9?= =?us-ascii?Q?E35Ak2L5viVi9MQzmHuT4a0jiddvmj8I98wx7Ai1x3QjMccMziEf4C0CulOk?= =?us-ascii?Q?gmZ2K3HKs+fU3qFkIYrE3dBMQOU9ad5WjYJ9Ah0mHzfNxxp48lQLf5bpuKBm?= =?us-ascii?Q?NT5TsLoMFetd8y5M51zCt84OjU0fHBYYIwp/ILj4fMZD1PYdY3tjBeyxOXpn?= =?us-ascii?Q?N/CPTBKkDv90C8nZPqSk9l+QkKOCb9ABRMrf+NfaDxG2hsHwX6lAkWHN89bN?= =?us-ascii?Q?pdQguDU4qHCkaP+BqJDRg+0QyNafyF/hXMFwgZiopJmq6lGzcKO38LN7RobK?= =?us-ascii?Q?04968QD1QZu/uj/6OR3763OskgamYWdQvJVJlGn6culRgOyn+KTVVnwJA1af?= =?us-ascii?Q?YgL8sUIcWltt+yWfO9KihAegxmSOkghRxdOP+Oy/857i1ddwRTAjrG8Chh8V?= =?us-ascii?Q?rGpmq6An48WhoJyoEjTWxD/PTKLaadaOKxHahKrLLdrbqsrMQmMHby06UN49?= =?us-ascii?Q?mUqH7DzKWmsWZO0cpNmsAE+DuY1JHO+ZA7P53ylDI4vPZV0m41yjheM/2Rqq?= =?us-ascii?Q?nrTpEsRIXDLK8z2dBZxcNt/3lJLu/5yrgFLnlmF136Y1j8IIMLRDS1FmwGny?= =?us-ascii?Q?HE0qTEQbemB6aFSWIDDGWf4A1zGdHBNXgKEut65QiQJW0gJzg/N2N+dxKa2C?= =?us-ascii?Q?ZeeIqwoabFJwP+m4shDYjmKqyQi+cQNn55lm3weXKum000doSZzNwJ41R5PQ?= =?us-ascii?Q?lFbT3pZSyNIwuGppyjiZFaJqDwHbaYfqN25Klr4sjMC8Y/+Ple3sKsqimVGT?= =?us-ascii?Q?r7/o7kLJ8iNmgqTxs+A7IXkpHUI9xYNqcSL0faXZH1DkHXtvqEaMLWK9r6LU?= =?us-ascii?Q?fsXRqSgKyjXK4oNZB9+udblsYYw8Z/8a+LoeUURHoz/40n6LXANdc5FjVAji?= =?us-ascii?Q?2Evh1iWZxKb6njyH2ygFjRxj84muJR5wvyKAIKkinLd+TS+J47aQnvruKGcu?= =?us-ascii?Q?uunzdDqM3DjI8c6sLb3T1rRl4IhmHJxlffqfgYll3kik3SRTgnESEXZtNfMi?= =?us-ascii?Q?jFrnpNZq66UzXv19R13RPkRKC0IT7MlkUV4kTjNU5jhskCFj8hALcbNLA2yW?= =?us-ascii?Q?Ct0rCWfFiDvpHy4OOLmTPZA5pFd9Izue1BRpWwRkPE5yXAGxMqfvX9oy8imF?= =?us-ascii?Q?Ov+w5dZbmAI=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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I can't find anything about it in the reference manual, and >> this ancient thread suggests that it indeed not supported: >> >> https://u-boot.denx.narkive.com/S8U7Z3Wr/dra7xx-booting-from-emmc-raw-boot-partition > > Correct, the ROM does not know about the eMMC boot partitions. > >> (2) The cpu does support looking at a sequence of offsets (0, 128K, >> 256K, 384K) for a proper header/image, and will read MLO from the first >> such offset. So it is possible to do a safe update of MLO. > > With caveats, yes. A valid header is all that matters and if the > contents fail it doesn't fall back to another location. > True, but that's not really any different from using eMMC boot partitions. You are safe against power failure causing a subsequent boot from seeing a partial/broken bootloader, but there's no fallback if the current active slot is broken. Only in this case one has to somewhat careful with how one does an update (such as postponing writing the first sector containing the magic header until everything else is written). >> However, it seems that MLO will always load U-Boot proper from some >> fixed offset (or partition), independent of which offset MLO was loaded >> from. So in order to implement an update mechanism for the whole >> bootloader which is safe against power failures, one would need to teach >> the SPL phase to pick an offset depending on the offset SPL itself was >> loaded from. But that in turn requires that the ROM code exposes that >> information. >> >> Does it? >> >> Poking around the reference manual, it seems there are some "tracing >> vectors" (0x4030ce40 ..), of which word 2, bits 12-15 are "memory boot >> trial 0-3". So perhaps those bits can be used to figure out which offset >> the ROM code eventually ended up using? But is there some more >> direct/documented approach? >> >> [Alternatively, one would have to build two distinct copies >> of U-Boot merely differing in their value of >> CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, but that's not a very >> attractive option]. > > Something, perhaps ad-hoc, would need to be done to support a redundant > load of which U-Boot to use, perhaps also leveraging the bootcount > support? I don't know about bootcount, but poking around a little, it seems to be easy to provide a spl_mmc_get_uboot_raw_sector() (or a board_ or arch_ one) implementing logic to translate those trace vector bits into an appropriate offset, with the definition of that function being guarded by some new config option that should also gate four hex options for setting those offsets. I'll have to play around with our bbb to see if those trace vector bits can actually be relied upon. Rasmus