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d="scan'208";a="136965443" Received: from pgcooper-mobl3.ger.corp.intel.com (HELO localhost) ([10.245.244.201]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 May 2025 03:07:59 -0700 From: Jani Nikula To: Suraj Kandpal , intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com, Suraj Kandpal Subject: Re: [PATCH 04/18] drm/i915/dpll: Rename macro for_each_shared_dpll In-Reply-To: <20250509042729.1152004-5-suraj.kandpal@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20250509042729.1152004-1-suraj.kandpal@intel.com> <20250509042729.1152004-5-suraj.kandpal@intel.com> Date: Fri, 09 May 2025 13:07:56 +0300 Message-ID: <871psym70j.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, 09 May 2025, Suraj Kandpal wrote: > Rename the macro for_each_shared_dpll to for_each_dpll since > this loop will not necessarily be used for only shared > dpll in future. > > Signed-off-by: Suraj Kandpal Reviewed-by: Jani Nikula > --- > .../gpu/drm/i915/display/intel_display_debugfs.c | 2 +- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 16 ++++++++-------- > drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 2 +- > drivers/gpu/drm/i915/display/intel_pch_refclk.c | 2 +- > 4 files changed, 11 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > index 8d0a1779dd19..3770ce9469d1 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > @@ -627,7 +627,7 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused) > display->dpll.ref_clks.nssc, > display->dpll.ref_clks.ssc); > > - for_each_shared_dpll(display, pll, i) { > + for_each_dpll(display, pll, i) { > drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index, > pll->info->name, pll->info->id); > drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index 6b4eb230f4b3..9974fdb6eaeb 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -127,8 +127,8 @@ intel_atomic_duplicate_dpll_state(struct intel_display *display, > struct intel_shared_dpll *pll; > int i; > > - /* Copy shared dpll state */ > - for_each_shared_dpll(display, pll, i) > + /* Copy dpll state */ > + for_each_dpll(display, pll, i) > dpll_state[pll->index] = pll->state; > } > > @@ -165,7 +165,7 @@ intel_get_shared_dpll_by_id(struct intel_display *display, > struct intel_shared_dpll *pll; > int i; > > - for_each_shared_dpll(display, pll, i) { > + for_each_dpll(display, pll, i) { > if (pll->info->id == id) > return pll; > } > @@ -348,7 +348,7 @@ intel_dpll_mask_all(struct intel_display *display) > unsigned long dpll_mask = 0; > int i; > > - for_each_shared_dpll(display, pll, i) { > + for_each_dpll(display, pll, i) { > drm_WARN_ON(display->drm, dpll_mask & BIT(pll->info->id)); > > dpll_mask |= BIT(pll->info->id); > @@ -521,7 +521,7 @@ void intel_shared_dpll_swap_state(struct intel_atomic_state *state) > if (!state->dpll_set) > return; > > - for_each_shared_dpll(display, pll, i) > + for_each_dpll(display, pll, i) > swap(pll->state, dpll_state[pll->index]); > } > > @@ -4542,7 +4542,7 @@ void intel_dpll_readout_hw_state(struct intel_display *display) > struct intel_shared_dpll *pll; > int i; > > - for_each_shared_dpll(display, pll, i) > + for_each_dpll(display, pll, i) > readout_dpll_hw_state(display, pll); > } > > @@ -4571,7 +4571,7 @@ void intel_dpll_sanitize_state(struct intel_display *display) > > intel_cx0_pll_power_save_wa(display); > > - for_each_shared_dpll(display, pll, i) > + for_each_dpll(display, pll, i) > sanitize_dpll_state(display, pll); > } > > @@ -4720,6 +4720,6 @@ void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state) > struct intel_shared_dpll *pll; > int i; > > - for_each_shared_dpll(display, pll, i) > + for_each_dpll(display, pll, i) > verify_single_dpll_state(display, pll, NULL, NULL); > } > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > index fe6c676737bb..d93072486831 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > @@ -30,7 +30,7 @@ > #include "intel_display_power.h" > #include "intel_wakeref.h" > > -#define for_each_shared_dpll(__display, __pll, __i) \ > +#define for_each_dpll(__display, __pll, __i) \ > for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \ > ((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++) > > diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c b/drivers/gpu/drm/i915/display/intel_pch_refclk.c > index 693b90e3dfc3..8bec55deff9f 100644 > --- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c > +++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c > @@ -535,7 +535,7 @@ static void ilk_init_pch_refclk(struct intel_display *display) > } > > /* Check if any DPLLs are using the SSC source */ > - for_each_shared_dpll(display, pll, i) { > + for_each_dpll(display, pll, i) { > u32 temp; > > temp = intel_de_read(display, PCH_DPLL(pll->info->id)); -- Jani Nikula, Intel