From: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Anthony PERARD" <anthony.perard@vates.tech>,
"Michal Orzel" <michal.orzel@amd.com>,
"Roger Pau Monné" <roger.pau@citrix.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
"Bertrand Marquis" <bertrand.marquis@arm.com>,
"Dario Faggioli" <dfaggioli@suse.com>,
"Juergen Gross" <jgross@suse.com>,
"George Dunlap" <gwd@xenproject.org>,
"Julien Grall" <julien@xen.org>
Subject: Re: [RFC PATCH v2] xen: add libafl-qemu fuzzer support
Date: Wed, 30 Apr 2025 12:19:11 +0000 [thread overview]
Message-ID: <871pt9eta9.fsf@epam.com> (raw)
In-Reply-To: <14fed5e0-643a-45cf-8929-461e11e7f4c3@suse.com> (Jan Beulich's message of "Wed, 30 Apr 2025 08:42:53 +0200")
Jan Beulich <jbeulich@suse.com> writes:
> On 30.04.2025 04:17, Volodymyr Babchuk wrote:
>> Julien Grall <julien@xen.org> writes:
>>>> --- /dev/null
>>>> +++ b/xen/arch/arm/include/asm/libafl_qemu_defs.h
>>>> @@ -0,0 +1,37 @@
>>>
>>> Missing license. Also, is this file taken from somewhere?
>>>
>>
>> I add MIT license, as libafl is dual licensed under Apache-2 and
>> MIT. This file is based on libafl_qemu [1]
>>
>>>> +#ifndef LIBAFL_QEMU_DEFS
>>>> +#define LIBAFL_QEMU_DEFS
>>>> +
>>>> +#define LIBAFL_STRINGIFY(s) #s
>>>> +#define XSTRINGIFY(s) LIBAFL_STRINGIFY(s)
>>>> +
>>>> +#if __STDC_VERSION__ >= 201112L
>>>> + #define STATIC_CHECKS \
>>>> + _Static_assert(sizeof(void *) <= sizeof(libafl_word), \
>>>> + "pointer type should not be larger and libafl_word");
>>>> +#else
>>>> + #define STATIC_CHECKS
>>>> +#endif
>>>
>>> No-one seems to use STATIC_CHECKS? Is this intended?
>>
>> I used this file as is... But I'll rework this part.
>>
>>>> +
>>>> +#define LIBAFL_SYNC_EXIT_OPCODE 0x66f23a0f
>>>> +#define LIBAFL_BACKDOOR_OPCODE 0x44f23a0f
>>>
>>> Are the opcode valid for arm32? If not, they should be protected with
>>> #ifdef CONFIG_ARM_64.
>>>
>>
>> It is valid even for x86_64. They use the same opcode for x86_64, arm,
>> aarch64 and riscv.
>
> Wow. On x86-64 they rely on the (prefix-less) opcode 0f3af2 to not gain
> any meaning. Somewhat similar on RISC-V, somewhere in MISC_MEM opcode
> space. Pretty fragile. Not to speak of what the effect of using such an
> opcode is on disassembly of surrounding code (at least for x86).
Yeah, they made some questionable choices, and opcode selection is one
of them. Also, the whole libafl-qemu code quality is not to the highest
standard, but there are no better alternatives.
They just hacked into TCG translator code and are looking for the their
special opcodes byte-per-byte:
[1] https://github.com/AFLplusplus/qemu-libafl-bridge/blob/main/accel/tcg/translator.c#L184
--
WBR, Volodymyr
next prev parent reply other threads:[~2025-04-30 12:19 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-15 0:36 [RFC PATCH v2] xen: add libafl-qemu fuzzer support Volodymyr Babchuk
2025-03-21 22:32 ` Stefano Stabellini
2025-03-21 22:57 ` Julien Grall
2025-03-21 23:34 ` Julien Grall
2025-03-21 23:31 ` Julien Grall
2025-04-30 2:17 ` Volodymyr Babchuk
2025-04-30 6:42 ` Jan Beulich
2025-04-30 12:19 ` Volodymyr Babchuk [this message]
2025-04-08 15:40 ` Jan Beulich
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