From: Thomas Gleixner <tglx@linutronix.de>
To: Sean Christopherson <seanjc@google.com>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
Jacob Pan <jacob.jun.pan@linux.intel.com>,
Jim Mattson <jmattson@google.com>
Subject: Re: [PATCH 1/8] x86/irq: Ensure initial PIR loads are performed exactly once
Date: Mon, 17 Mar 2025 12:23:31 +0100 [thread overview]
Message-ID: <871puv6guk.ffs@tglx> (raw)
In-Reply-To: <20250315030630.2371712-2-seanjc@google.com>
On Fri, Mar 14 2025 at 20:06, Sean Christopherson wrote:
> Ensure the PIR is read exactly once at the start of handle_pending_pir(),
> to guarantee that checking for an outstanding posted interrupt in a given
> chuck doesn't reload the chunk from the "real" PIR. Functionally, a reload
> is benign, but it would defeat the purpose of pre-loading into a copy.
>
> Fixes: 1b03d82ba15e ("x86/irq: Install posted MSI notification handler")
> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
next prev parent reply other threads:[~2025-03-17 11:23 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-15 3:06 [PATCH 0/8] x86/irq: KVM: Optimize KVM's PIR harvesting Sean Christopherson
2025-03-15 3:06 ` [PATCH 1/8] x86/irq: Ensure initial PIR loads are performed exactly once Sean Christopherson
2025-03-17 11:23 ` Thomas Gleixner [this message]
2025-03-15 3:06 ` [PATCH 2/8] x86/irq: Track if IRQ was found in PIR during initial loop (to load PIR vals) Sean Christopherson
2025-03-17 13:13 ` Thomas Gleixner
2025-03-17 16:53 ` Sean Christopherson
2025-03-18 9:27 ` Thomas Gleixner
2025-03-15 3:06 ` [PATCH 3/8] KVM: VMX: Ensure vIRR isn't reloaded at odd times when sync'ing PIR Sean Christopherson
2025-03-15 3:06 ` [PATCH 4/8] x86/irq: KVM: Track PIR bitmap as an "unsigned long" array Sean Christopherson
2025-03-15 3:06 ` [PATCH 5/8] KVM: VMX: Process PIR using 64-bit accesses on 64-bit kernels Sean Christopherson
2025-03-15 3:06 ` [PATCH 6/8] KVM: VMX: Isolate pure loads from atomic XCHG when processing PIR Sean Christopherson
2025-03-15 3:06 ` [PATCH 7/8] KVM: VMX: Use arch_xchg() when processing PIR to avoid instrumentation Sean Christopherson
2025-03-15 3:06 ` [PATCH 8/8] x86/irq: KVM: Add helper for harvesting PIR to deduplicate KVM and posted MSIs Sean Christopherson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=871puv6guk.ffs@tglx \
--to=tglx@linutronix.de \
--cc=bp@alien8.de \
--cc=dave.hansen@linux.intel.com \
--cc=jacob.jun.pan@linux.intel.com \
--cc=jmattson@google.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=seanjc@google.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.