From: Fabiano Rosas <farosas@suse.de>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Claudio Fontana" <cfontana@suse.de>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Alexander Graf" <agraf@csgraf.de>
Subject: Re: [PATCH 00/20] target/arm: CONFIG_TCG=n part 1
Date: Wed, 18 Jan 2023 18:28:02 -0300 [thread overview]
Message-ID: <871qnrcz31.fsf@suse.de> (raw)
In-Reply-To: <9c740b33-240b-b4f0-82a1-cc01ad886edc@linaro.org>
Philippe Mathieu-Daudé <philmd@linaro.org> writes:
> Hi Fabiano,
>
> On 18/1/23 20:34, Fabiano Rosas wrote:
>> These are the already reviewed patches from the first half of my
>> previous series:
>> https://lore.kernel.org/r/20230113140419.4013-1-farosas@suse.de
>>
>> This unbreaks the --disable-tcg build, but there are issues in runtime
>> that are still being hashed out in the other series.
>>
>> For the build _with_ TCG, this should behave the same as master.
>>
>> Based on Richard's "target/arm: Introduce aarch64_set_svcr":
>> https://lore.kernel.org/r/20230112004322.161330-1-richard.henderson@linaro.org
>
> $ git am
> 20230111_richard_henderson_target_arm_introduce_aarch64_set_svcr.mbx
> Applying: target/arm: Introduce aarch64_set_svcr
> $ git am ./20230118_farosas_target_arm_config_tcg_n_part_1.mbx
> Applying: target/arm: rename handle_semihosting to tcg_handle_semihosting
> Applying: target/arm: wrap psci call with tcg_enabled
> Applying: target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
> Applying: target/arm: Move PC alignment check
> Applying: target/arm: Move cpregs code out of cpu.h
> Applying: target/arm: Move define_debug_regs() to cpregs.c
> error: target/arm/cpregs.c: does not exist in index
> Patch failed at 0006 target/arm: Move define_debug_regs() to cpregs.c
>
> I am based on commit 7ec8aeb604 ("Merge tag 'pull-tpm-2023-01-17-1' of
> https://github.com/stefanberger/qemu-tpm into staging"), what am I missing?
How did you fetch the series? You are missing patch 06. Maybe it is too
big for the method you used?
next prev parent reply other threads:[~2023-01-18 21:28 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 19:34 [PATCH 00/20] target/arm: CONFIG_TCG=n part 1 Fabiano Rosas
2023-01-18 19:34 ` [PATCH 01/20] target/arm: rename handle_semihosting to tcg_handle_semihosting Fabiano Rosas
2023-01-18 19:35 ` [PATCH 02/20] target/arm: wrap psci call with tcg_enabled Fabiano Rosas
2023-01-18 19:35 ` [PATCH 03/20] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Fabiano Rosas
2023-01-18 19:35 ` [PATCH 04/20] target/arm: Move PC alignment check Fabiano Rosas
2023-01-18 19:35 ` [PATCH 05/20] target/arm: Move cpregs code out of cpu.h Fabiano Rosas
2023-01-18 19:35 ` [PATCH 06/20] target/arm: Move cpregs code into cpregs.c Fabiano Rosas
2023-01-18 19:35 ` [PATCH 07/20] target/arm: Move define_debug_regs() to cpregs.c Fabiano Rosas
2023-01-18 19:35 ` [PATCH 08/20] target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled Fabiano Rosas
2023-01-18 19:35 ` [PATCH 09/20] target/arm: move translate modules to tcg/ Fabiano Rosas
2023-01-18 19:35 ` [PATCH 10/20] target/arm: move helpers " Fabiano Rosas
2023-01-18 19:35 ` [PATCH 11/20] target/arm: Move psci.c into the tcg directory Fabiano Rosas
2023-01-18 19:35 ` [PATCH 12/20] target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled Fabiano Rosas
2023-01-18 19:35 ` [PATCH 13/20] target/arm: Move hflags code into the tcg directory Fabiano Rosas
2023-01-18 19:35 ` [PATCH 14/20] target/arm: Move regime_using_lpae_format into internal.h Fabiano Rosas
2023-01-18 19:35 ` [PATCH 15/20] target/arm: Don't access TCG code when debugging with KVM Fabiano Rosas
2023-01-18 19:35 ` [PATCH 16/20] cpu-defs.h: Expose CPUTLBEntryFull to non-TCG code Fabiano Rosas
2023-01-18 19:35 ` [PATCH 17/20] target/arm: Move cortex sysregs into cpregs.c Fabiano Rosas
2023-01-18 19:35 ` [PATCH 18/20] tests/qtest: Restrict bcm2835-dma-test to CONFIG_RASPI Fabiano Rosas
2023-01-18 19:35 ` [PATCH 19/20] tests/avocado: Skip tests that require a missing accelerator Fabiano Rosas
2023-01-18 19:35 ` [PATCH 20/20] tests/avocado: Tag TCG tests with accel:tcg Fabiano Rosas
2023-01-18 21:05 ` [PATCH 00/20] target/arm: CONFIG_TCG=n part 1 Philippe Mathieu-Daudé
2023-01-18 21:28 ` Fabiano Rosas [this message]
2023-01-19 7:05 ` Philippe Mathieu-Daudé
2023-01-19 7:10 ` Philippe Mathieu-Daudé
2023-01-19 7:41 ` Philippe Mathieu-Daudé
2023-01-19 10:27 ` Philippe Mathieu-Daudé
2023-01-19 12:06 ` Philippe Mathieu-Daudé
2023-01-19 12:22 ` Philippe Mathieu-Daudé
2023-01-19 12:32 ` Fabiano Rosas
2023-01-19 13:46 ` Philippe Mathieu-Daudé
2023-01-19 14:26 ` Fabiano Rosas
2023-01-19 12:35 ` Philippe Mathieu-Daudé
2023-01-19 15:58 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=871qnrcz31.fsf@suse.de \
--to=farosas@suse.de \
--cc=agraf@csgraf.de \
--cc=alex.bennee@linaro.org \
--cc=cfontana@suse.de \
--cc=ehabkost@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.