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Mon, 13 Sep 2021 03:10:51 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id j17sm6910737wrh.67.2021.09.13.03.10.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Sep 2021 03:10:49 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 08E9F1FF96; Mon, 13 Sep 2021 11:10:49 +0100 (BST) References: <20210903145938.1321571-1-alex.bennee@linaro.org> <36bc7691-c0d9-9e18-dade-4d95405dcd62@linaro.org> User-agent: mu4e 1.7.0; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Richard Henderson Subject: Re: [PATCH] accel/tcg: assert insn_idx will always be valid before plugin_inject_cb Date: Mon, 13 Sep 2021 11:06:39 +0100 In-reply-to: <36bc7691-c0d9-9e18-dade-4d95405dcd62@linaro.org> Message-ID: <871r5swztj.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > On 9/3/21 7:59 AM, Alex Benn=C3=A9e wrote: >> Coverity doesn't know enough about how we have arranged our plugin TCG >> ops to know we will always have incremented insn_idx before injecting >> the callback. Let us assert it for the benefit of Coverity and protect >> ourselves from accidentally breaking the assumption and triggering >> harder to grok errors deeper in the code if we attempt a negative >> indexed array lookup. >> Fixes: Coverity 1459509 >> Signed-off-by: Alex Benn=C3=A9e >> --- >> accel/tcg/plugin-gen.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c >> index 88e25c6df9..b38aa1bb36 100644 >> --- a/accel/tcg/plugin-gen.c >> +++ b/accel/tcg/plugin-gen.c >> @@ -820,10 +820,9 @@ static void pr_ops(void) >> static void plugin_gen_inject(const struct qemu_plugin_tb *plugin_tb) >> { >> TCGOp *op; >> - int insn_idx; >> + int insn_idx =3D -1; >> pr_ops(); >> - insn_idx =3D -1; >> QSIMPLEQ_FOREACH(op, &tcg_ctx->plugin_ops, plugin_link) { >> enum plugin_gen_from from =3D op->args[0]; >> enum plugin_gen_cb type =3D op->args[1]; >> @@ -834,6 +833,7 @@ static void plugin_gen_inject(const struct qemu_plug= in_tb *plugin_tb) >> type =3D=3D PLUGIN_GEN_ENABLE_MEM_HELPER) { >> insn_idx++; >> } >> + g_assert(from =3D=3D PLUGIN_GEN_FROM_TB || insn_idx >=3D 0); >> plugin_inject_cb(plugin_tb, op, insn_idx); > > Hmm. This is the single caller of plugin_inject_cb. > > I think we could simplify all of this by inlining it, so that we can > put these blocks into their proper place within the switch. I guess. This was the simplest form for calming coverity but I can experiment with more refactoring. > Also, existing strageness in insn_idx being incremented for non-insns? It shouldn't be - it's just using the presence of the memory instrumentation as a proxy for the start of a instruction and dealing with the slightly different start of block boundary.=20 > Should it be named something else? I haven't looked at how it's > really used in the end. We need the insn idx to find the registered callbacks for a given instruction later. We could maybe embed a metadata TCGOp that could track this for us but that might make TCG a bit more confusing as it doesn't really need that information? > > > r~ --=20 Alex Benn=C3=A9e