From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [1/3] usb: dwc3: Add reference clock properties From: Felipe Balbi Message-Id: <871s7xv1et.fsf@linux.intel.com> Date: Wed, 07 Nov 2018 08:37:14 +0200 To: Thinh Nguyen Thinh Nguyen , "linux-usb@vger.kernel.org" , "devicetree@vger.kernel.org" , Rob Herring , Mark Rutland Cc: John Youn List-ID: SGksCgpUaGluaCBOZ3V5ZW4gPHRoaW5oLm5ndXllbkBzeW5vcHN5cy5jb20+IHdyaXRlczoKPj4g VGhpbmggTmd1eWVuIDx0aGluaC5uZ3V5ZW5Ac3lub3BzeXMuY29tPiB3cml0ZXM6Cj4+PiBBZGQg dHdvIG5ldyBkZXZpY2UgcHJvcGVydGllcyB0byBwcm9ncmFtIHRoZSByZWZlcmVuY2UgY2xvY2sg cGVyaW9kIGFuZAo+Pj4gdG8gZW5hYmxlIGxvdyBwb3dlciBtYW5hZ2VtZW50IHVzaW5nIHRoZSBy ZWZlcmVuY2UgY2xvY2suIFRoaXMgYWxsb3dzIGEKPj4+IGhpZ2hlciBkZW1hbmQgdG8gZ28gaW4g bG93IHBvd2VyIGZvciBBdWRpbyBEZXZpY2UgQ2xhc3MgZGV2aWNlcy4gVGhpcwo+Pj4gZmVhdHVy ZSBpcyBjdXJyZW50bHkgb25seSB2YWxpZCBmb3IgRFdDX3VzYjMxIHBlcmlwaGVyYWwgY29udHJv bGxlcgo+Pj4gdjEuODBhIGFuZCBoaWdoZXIuCj4+Pgo+Pj4gU2V0ICJzbnBzLHJlZmNsay1wZXJp b2QtbnMiIHRvIHByb2dyYW0gdGhlIHJlZmVyZW5jZSBjbG9jayBwZXJpb2QuIFRoZQo+Pj4gdmFs aWQgaW5wdXQgcGVyaW9kcyBhcmUgYXMgZm9sbG93Ogo+Pj4gICstLS0tLS0tLS0tLS0tKy0tLS0t LS0tLS0tLS0tLS0tKwo+Pj4gIHwgUGVyaW9kIChucykgfCBGcmVxIChNSHopICAgICAgfAo+Pj4g ICstLS0tLS0tLS0tLS0tKy0tLS0tLS0tLS0tLS0tLS0tKwo+Pj4gIHwgMjUgICAgICAgICAgfCAz OS43LzQwICAgICAgICAgfAo+Pj4gIHwgNDEgICAgICAgICAgfCAyNC40ICAgICAgICAgICAgfAo+ Pj4gIHwgNTAgICAgICAgICAgfCAyMCAgICAgICAgICAgICAgfAo+Pj4gIHwgNTIgICAgICAgICAg fCAxOS4yICAgICAgICAgICAgfAo+Pj4gIHwgNTggICAgICAgICAgfCAxNy4yICAgICAgICAgICAg fAo+Pj4gIHwgNjIgICAgICAgICAgfCAxNi4xICAgICAgICAgICAgfAo+Pj4gICstLS0tLS0tLS0t LS0tKy0tLS0tLS0tLS0tLS0tLS0tKwo+Pj4KPj4+IFNldCAic25wcyxyZWZjbGstbHBtIiB0byBl bmFibGUgbG93IHBvd2VyIHNjaGVkdWxpbmcgb2YgaXNvY2hyb25vdXMKPj4+IHRyYW5zZmVycyBi eSBydW5uaW5nIFNPRi9JVFAgY291bnRlcnMgdXNpbmcgdGhlIHJlZmVyZW5jZSBjbG9jay4gQm90 aAo+Pj4gInNucHMsZGlzX3UyX3N1c3BoeV9xdWlyayIgYW5kICJzbnBzLGRpc19lbmJsc2xwbV9x dWlyayIgbXVzdCBub3QgYmUKPj4+IHNldCBmb3IgdGhpcyBmZWF0dXJlIHRvIGJlIGVuYWJsZWQu Cj4+Pgo+Pj4gU2lnbmVkLW9mZi1ieTogVGhpbmggTmd1eWVuIDx0aGluaG5Ac3lub3BzeXMuY29t Pgo+Pj4gLS0tCj4+PiAgRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL3VzYi9kd2Mz LnR4dCB8IDE4ICsrKysrKysrKysrKysrKysrKwo+Pj4gIDEgZmlsZSBjaGFuZ2VkLCAxOCBpbnNl cnRpb25zKCspCj4+Pgo+Pj4gZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9i aW5kaW5ncy91c2IvZHdjMy50eHQgYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mv dXNiL2R3YzMudHh0Cj4+PiBpbmRleCA2MzY2MzBmYjkyZDcuLjcxMmIzNDRjM2EzMSAxMDA2NDQK Pj4+IC0tLSBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy91c2IvZHdjMy50eHQK Pj4+ICsrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy91c2IvZHdjMy50eHQK Pj4+IEBAIC05NSw2ICs5NSwyNCBAQCBPcHRpb25hbCBwcm9wZXJ0aWVzOgo+Pj4gIAkJCXRoaXMg YW5kIHR4LXRoci1udW0tcGt0LXByZCB0byBhIHZhbGlkLCBub24temVybyB2YWx1ZQo+Pj4gIAkJ CTEtMTYgKERXQ191c2IzMSBwcm9ncmFtbWluZyBndWlkZSBzZWN0aW9uIDEuMi4zKSB0bwo+Pj4g IAkJCWVuYWJsZSBwZXJpb2RpYyBFU1MgVFggdGhyZXNob2xkLgo+Pj4gKyAtIHNucHMscmVmY2xr LXBlcmlvZC1uczogc2V0IHRvIHByb2dyYW0gdGhlIHJlZmVyZW5jZSBjbG9jayBwZXJpb2QuIFRo ZSB2YWxpZAo+Pj4gKyAgIAkJCWlucHV0IHBlcmlvZHMgYXJlIGFzIGZvbGxvdzoKPj4+ICsJCQkr LS0tLS0tLS0tLS0tLSstLS0tLS0tLS0tLS0tLS0tLSsKPj4+ICsJCQl8IFBlcmlvZCAobnMpIHwg RnJlcSAoTUh6KSAgICAgIHwKPj4+ICsJCQkrLS0tLS0tLS0tLS0tLSstLS0tLS0tLS0tLS0tLS0t LSsKPj4+ICsJCQl8IDI1ICAgICAgICAgIHwgMzkuNy80MCAgICAgICAgIHwKPj4+ICsJCQl8IDQx ICAgICAgICAgIHwgMjQuNCAgICAgICAgICAgIHwKPj4+ICsJCQl8IDUwICAgICAgICAgIHwgMjAg ICAgICAgICAgICAgIHwKPj4+ICsJCQl8IDUyICAgICAgICAgIHwgMTkuMiAgICAgICAgICAgIHwK Pj4+ICsJCQl8IDU4ICAgICAgICAgIHwgMTcuMiAgICAgICAgICAgIHwKPj4+ICsJCQl8IDYyICAg ICAgICAgIHwgMTYuMSAgICAgICAgICAgIHwKPj4+ICsJCQkrLS0tLS0tLS0tLS0tLSstLS0tLS0t LS0tLS0tLS0tLSsKPj4+ICsgLSBzbnBzLGVuYWJsZS1yZWZjbGstbHBtOiBzZXQgdG8gZW5hYmxl IGxvdyBwb3dlciBzY2hlZHVsaW5nIG9mIGlzb2Nocm9ub3VzCj4+PiArCQkJdHJhbnNmZXJzIGJ5 IHJ1bm5pbmcgU09GL0lUUCBjb3VudGVycyB1c2luZyB0aGUKPj4+ICsJCQlyZWZlcmVuY2UgY2xv Y2suIE9ubHkgdmFsaWQgZm9yIERXQ191c2IzMSBwZXJpcGhlcmFsCj4+PiArCQkJY29udHJvbGxl ciB2MS44MGEgYW5kIGhpZ2hlci4gQm90aAo+Pj4gKwkJCSJzbnBzLGRpc191Ml9zdXNwaHlfcXVp cmsiIGFuZAo+Pj4gKwkJCSJzbnBzLGRpc19lbmJsc2xwbV9xdWlyayIgbXVzdCBub3QgYmUgc2V0 Lgo+PiBzb3VuZHMgbGlrZSB5b3Ugc2hvdWxkIHJlbHkgb24gY2xrIEFQSSBoZXJlLiBUaGVuIG9u IGRyaXZlciBjYWxsCj4+IGNsa19nZXRfcmF0ZSgpIHRvIGNvbXB1dGVyIHdoYXRldmVyIHlvdSBu ZWVkIHRvIGNvbXB1dGUuCj4+Cj4gVGhlcmUncyBub3RoaW5nIHRvIGNvbXB1dGUgaGVyZS4gV2Ug Y2FuIHNpbXBseSBlbmFibGUgdGhpcyBmZWF0dXJlIHdpdGgKPiAic25wcywgZW5hYmxlLXJlZmNs ay1scG0iIGFuZCB0aGUgY29udHJvbGxlciB3aWxsIHVzZSB0aGUgZGVmYXVsdCByZWZjbGsKPiBz ZXR0aW5ncy4KClJpZ2h0LCByaWdodC4gV2hhdCBJJ20gc2F5aW5nLCB0aG91Z2gsIGlzIHRoYXQg d2UgaGF2ZSBhIGNsb2NrIEFQSSBmb3IKZGVzY3JpYmluZyBhIGNsb2NrLiBTbyB3aHkgd291bGRu J3Qgd2UgcmVseSBvbiB0aGF0IEFQSSBmb3IgdGhpcz8gSQp0aGluayBib3RoIG9mIHRoZXNlIG5l dyBwcm9wZXJ0aWVzIGNhbiBiZSByZXBsYWNlZCB3aXRoIHN0YW5kYXJkIGNsb2NrCkFQSSBwcm9w ZXJ0aWVzOgoKCWNsb2NrcyA9IDwmY2xrMT4sIC4uLiwgPCZscG1fY2xrPgogICAgICAgIGNsb2Nr LW5hbWVzID0gImNsb2NrMSIsIC4uLi4sICJscG0iOwoKVGhlbiBkd2MzIGNvcmUgY291bGQsIHNp bXBseSwgY2hlY2sgaWYgd2UgaGF2ZSBhIGNsb2NrIG5hbWVkICJscG0iIGFuZAppZiB0aGVyZSBp cywgdXNlIE5TRUNTX1BFUl9TRUMgLyBjbGtfZ2V0X3JhdGUoKSB0byBnZXQgaXRzIHBlcmlvZCBh bmQKd3JpdGUgaXQgdG8gdGhlIHJlZ2lzdGVyIHRoYXQgbmVlZHMgdGhlIGluZm9ybWF0aW9uLgo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com ([134.134.136.31]:50139 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726194AbeKGQGX (ORCPT ); Wed, 7 Nov 2018 11:06:23 -0500 From: Felipe Balbi Subject: Re: [PATCH 1/3] usb: dwc3: Add reference clock properties In-Reply-To: <30102591E157244384E984126FC3CB4F639A080E@us01wembx1.internal.synopsys.com> References: <877ehqv44p.fsf@linux.intel.com> <30102591E157244384E984126FC3CB4F639A080E@us01wembx1.internal.synopsys.com> Date: Wed, 07 Nov 2018 08:37:14 +0200 Message-ID: <871s7xv1et.fsf@linux.intel.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" Sender: devicetree-owner@vger.kernel.org To: Thinh Nguyen Thinh Nguyen , "linux-usb@vger.kernel.org" , "devicetree@vger.kernel.org" , Rob Herring , Mark Rutland Cc: John Youn List-ID: --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Hi, Thinh Nguyen writes: >> Thinh Nguyen writes: >>> Add two new device properties to program the reference clock period and >>> to enable low power management using the reference clock. This allows a >>> higher demand to go in low power for Audio Device Class devices. This >>> feature is currently only valid for DWC_usb31 peripheral controller >>> v1.80a and higher. >>> >>> Set "snps,refclk-period-ns" to program the reference clock period. The >>> valid input periods are as follow: >>> +-------------+-----------------+ >>> | Period (ns) | Freq (MHz) | >>> +-------------+-----------------+ >>> | 25 | 39.7/40 | >>> | 41 | 24.4 | >>> | 50 | 20 | >>> | 52 | 19.2 | >>> | 58 | 17.2 | >>> | 62 | 16.1 | >>> +-------------+-----------------+ >>> >>> Set "snps,refclk-lpm" to enable low power scheduling of isochronous >>> transfers by running SOF/ITP counters using the reference clock. Both >>> "snps,dis_u2_susphy_quirk" and "snps,dis_enblslpm_quirk" must not be >>> set for this feature to be enabled. >>> >>> Signed-off-by: Thinh Nguyen >>> --- >>> Documentation/devicetree/bindings/usb/dwc3.txt | 18 ++++++++++++++++++ >>> 1 file changed, 18 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documenta= tion/devicetree/bindings/usb/dwc3.txt >>> index 636630fb92d7..712b344c3a31 100644 >>> --- a/Documentation/devicetree/bindings/usb/dwc3.txt >>> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt >>> @@ -95,6 +95,24 @@ Optional properties: >>> this and tx-thr-num-pkt-prd to a valid, non-zero value >>> 1-16 (DWC_usb31 programming guide section 1.2.3) to >>> enable periodic ESS TX threshold. >>> + - snps,refclk-period-ns: set to program the reference clock period. T= he valid >>> + input periods are as follow: >>> + +-------------+-----------------+ >>> + | Period (ns) | Freq (MHz) | >>> + +-------------+-----------------+ >>> + | 25 | 39.7/40 | >>> + | 41 | 24.4 | >>> + | 50 | 20 | >>> + | 52 | 19.2 | >>> + | 58 | 17.2 | >>> + | 62 | 16.1 | >>> + +-------------+-----------------+ >>> + - snps,enable-refclk-lpm: set to enable low power scheduling of isoch= ronous >>> + transfers by running SOF/ITP counters using the >>> + reference clock. Only valid for DWC_usb31 peripheral >>> + controller v1.80a and higher. Both >>> + "snps,dis_u2_susphy_quirk" and >>> + "snps,dis_enblslpm_quirk" must not be set. >> sounds like you should rely on clk API here. Then on driver call >> clk_get_rate() to computer whatever you need to compute. >> > There's nothing to compute here. We can simply enable this feature with > "snps, enable-refclk-lpm" and the controller will use the default refclk > settings. Right, right. What I'm saying, though, is that we have a clock API for describing a clock. So why wouldn't we rely on that API for this? I think both of these new properties can be replaced with standard clock API properties: clocks =3D <&clk1>, ..., <&lpm_clk> clock-names =3D "clock1", ...., "lpm"; Then dwc3 core could, simply, check if we have a clock named "lpm" and if there is, use NSECS_PER_SEC / clk_get_rate() to get its period and write it to the register that needs the information. =2D-=20 balbi --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEElLzh7wn96CXwjh2IzL64meEamQYFAlviiBwACgkQzL64meEa mQbJBg//QQxoI7NGbe3MVib+VYUb/JkyMOI2OnnNgwOgYMpcrbcQbYaNids8VTY6 ytODWNe2NvRPsS5rYcrKptogCA8/j5XJAxXshbGtmDlFY8QrYtecPU5GWxOlvMCe yH70mvGyinjhrwVDVxjL6hph4aYLiFDn3eK5eNq+pvTASXf74XVLEAchTmZ9+O2L qiyZKCOAXfT6/hIU4cuuShGKmqwELQ575+uZIrQdLn2ru54a/PowGvBcv5cJWDef gm5+QashdsbU40pifHRfWqNDrdqWg503MG5TNhf8ZMLUc9/T1KRlD3OUqR2pDgU5 M1qmu8vbIM4r3Yz9QHzrNvm5x1bPHmheod02824Ysk467/ydjv0AvfG6x8dMmZnL YcWzY1T7EYukhdLXGaweCZ51J1xkrS4NE7M4zjwWoSwYXgKSt28wLqqSjSwYdW2X 9R0JeyOVl6Y8OA2lcI3CzcqNRhjFpeYI6FN+D0JxWDLXlUiF/iYEMj3z5rvhWAfi yzub6NQKfNlkR/bP+0Bc1eeUupoq/d2sAk8mbjXDwJ1M3npB92VldRC7cHafaR1h Gj21wpOXhrl8bpMO07318sKR+UAfH4B7Fw4r3OJ4FMfVN20plZmYO3nJUIsCD/xQ wHoHVRfy4ts1kE9VRdgGW2/T2pf3VkepQhB4fJAeas/eVs3yFcw= =e6B1 -----END PGP SIGNATURE----- --=-=-=--