From mboxrd@z Thu Jan 1 00:00:00 1970 From: Felipe Balbi Subject: Re: [PATCH] usb: dwc3: core: power on PHYs before initializing core Date: Fri, 09 Mar 2018 11:01:17 +0200 Message-ID: <871sgtbp2a.fsf@linux.intel.com> References: <1515729616-8639-1-git-send-email-william.wu@rock-chips.com> <87ina6vodf.fsf@linux.intel.com> <20180308164916.GA65031@rodete-desktop-imager.corp.google.com> Mime-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha512; protocol="application/pgp-signature" Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Roger Quadros , Brian Norris Cc: William Wu , gregkh@linuxfoundation.org, heiko@sntech.de, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-rockchip@lists.infradead.org, frank.wang@rock-chips.com, huangtao@rock-chips.com, dianders@google.com, briannorris@google.com, groeck@google.com, daniel.meng@rock-chips.com, John.Youn@synopsys.com, lin.huang@rock-chips.com List-Id: linux-rockchip.vger.kernel.org --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Hi, Roger Quadros writes: > Hi, > > On 08/03/18 18:49, Brian Norris wrote: >> Hi, >>=20 >> On Thu, Mar 08, 2018 at 12:43:40PM +0200, Felipe Balbi wrote: >>> William Wu writes: >>>> The dwc3_core_init() gets the PHYs and initializes the PHYs with >>>> the usb_phy_init() and phy_init() functions before initializing >>>> core, and power on the PHYs after core initialization is done. >>>> >>>> However, some platforms (e.g. Rockchip RK3399 DWC3 with Type-C >>>> USB3 PHY), it needs to do some special operation while power on >>>> the Type-C PHY before initializing DWC3 core. It's because that >>>> the RK3399 Type-C PHY requires to hold the DWC3 controller in >>>> reset state to keep the PIPE power state in P2 while configuring >>>> the Type-C PHY, otherwise, it may cause waiting for the PIPE ready >>>> timeout. In this case, if we power on the PHYs after the DWC3 core >>>> initialization is done, the core will be reset to uninitialized >>>> state after power on the PHYs. >>>> >>>> Fix this by powering on the PHYs before initializing core. And >>>> because the GUID register may also be reset in this case, so we >>>> need to configure the GUID register after powering on the PHYs. >>>> >>>> Signed-off-by: William Wu >>> >>> does this cause any regressions for your boards? >>=20 >> I'm not Roger, but I believe it was determined we don't need this for >> the Rockchip systems for which William was originally sending this. At >> least not right now. I believe our PHY init problems were mostly >> resolved in other ways. >>=20 >> (Although I hear USB is currently pretty broken around suspend/resume >> for us on -next. Likely unrelated.) >>=20 >> I guess we never clearly replied stating the above. I hope this isn't >> merged anywhere? Or I guess it's no problem to me at the moment, but it >> might be needless churn. >>=20 > > I did some quick tests on TI platforms and didn't see any issues with thi= s patch. > Since this patch isn't really fixing your problem and we didn't have any > problems to start with I'd suggest to avoid this churn for now. fair enough, I won't apply it :-) =2D-=20 balbi --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCgAdFiEElLzh7wn96CXwjh2IzL64meEamQYFAlqiTV0ACgkQzL64meEa mQYAbBAAq6DNTsVhFehYtxLSararzyR1Bl7Jmm7fW7a5WRQL6oymcPBUIxqkNZeW HKzeSPXSKptZamTwbTsy6f0O5KgZ+InB+/BpffoBMz4+H2m+od4n/QJJy1NRLF7v 9kvcX6vmfl+2qnEUTXZA3iuq5Ke7IXUsOiZbr54GnLdRLDP+Pc0G6figfpW/d8cA XkJAxajTnxYhhm/TBF+v/tihfMTyJtNYRp1Z/YZcyGNAAy12mB/XA5bP8YDdn9Rz Jse5StIviEGb/hKNd6S+myzv69tixXqFbyqSd2mG4ZgBOKxNg6IUHvU9sfc2xw/9 /K+pmceXwDUNOBJsICp6Akwq4jRqYNEVCfdRaMMvFTEHDm70LwkVCnC8XwFZpQ1k KHL0/YnOBJH8L/hrinG6GoraURUstt8B/1EgVdnry7kYr952F1gDN+OgccI8PyiZ 8Jqy6ec4IS+wHmpVVsninE634t9iuYKqUt/OpdsXHIhGfMRqPRy+F0M3qbAkY6/J M0TZGgIWMtxG4AsBdGK+MJUk31s4jwIO7mHRIMoXFBXTEoy57V5Ir5vAZVZKWwHW 2izw8+thTpw6UWJ79aFMd8GmeRIuzbCpWujK1aFj3x/fBxPE/aiTGfOzbmgZvUBy r7lke7ehQz3y8b0dRMuRudfm6qCg+Ew1EX6uUDvF/y7Vw1bfo9w= =VnTN -----END PGP SIGNATURE----- --=-=-=-- From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: usb: dwc3: core: power on PHYs before initializing core From: Felipe Balbi Message-Id: <871sgtbp2a.fsf@linux.intel.com> Date: Fri, 09 Mar 2018 11:01:17 +0200 To: Roger Quadros , Brian Norris Cc: William Wu , gregkh@linuxfoundation.org, heiko@sntech.de, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-rockchip@lists.infradead.org, frank.wang@rock-chips.com, huangtao@rock-chips.com, dianders@google.com, briannorris@google.com, groeck@google.com, daniel.meng@rock-chips.com, John.Youn@synopsys.com, lin.huang@rock-chips.com List-ID: SGksCgpSb2dlciBRdWFkcm9zIDxyb2dlcnFAdGkuY29tPiB3cml0ZXM6Cj4gSGksCj4KPiBPbiAw OC8wMy8xOCAxODo0OSwgQnJpYW4gTm9ycmlzIHdyb3RlOgo+PiBIaSwKPj4gCj4+IE9uIFRodSwg TWFyIDA4LCAyMDE4IGF0IDEyOjQzOjQwUE0gKzAyMDAsIEZlbGlwZSBCYWxiaSB3cm90ZToKPj4+ IFdpbGxpYW0gV3UgPHdpbGxpYW0ud3VAcm9jay1jaGlwcy5jb20+IHdyaXRlczoKPj4+PiBUaGUg ZHdjM19jb3JlX2luaXQoKSBnZXRzIHRoZSBQSFlzIGFuZCBpbml0aWFsaXplcyB0aGUgUEhZcyB3 aXRoCj4+Pj4gdGhlIHVzYl9waHlfaW5pdCgpIGFuZCBwaHlfaW5pdCgpIGZ1bmN0aW9ucyBiZWZv cmUgaW5pdGlhbGl6aW5nCj4+Pj4gY29yZSwgYW5kIHBvd2VyIG9uIHRoZSBQSFlzIGFmdGVyIGNv cmUgaW5pdGlhbGl6YXRpb24gaXMgZG9uZS4KPj4+Pgo+Pj4+IEhvd2V2ZXIsIHNvbWUgcGxhdGZv cm1zIChlLmcuIFJvY2tjaGlwIFJLMzM5OSBEV0MzIHdpdGggVHlwZS1DCj4+Pj4gVVNCMyBQSFkp LCBpdCBuZWVkcyB0byBkbyBzb21lIHNwZWNpYWwgb3BlcmF0aW9uIHdoaWxlIHBvd2VyIG9uCj4+ Pj4gdGhlIFR5cGUtQyBQSFkgYmVmb3JlIGluaXRpYWxpemluZyBEV0MzIGNvcmUuIEl0J3MgYmVj YXVzZSB0aGF0Cj4+Pj4gdGhlIFJLMzM5OSBUeXBlLUMgUEhZIHJlcXVpcmVzIHRvIGhvbGQgdGhl IERXQzMgY29udHJvbGxlciBpbgo+Pj4+IHJlc2V0IHN0YXRlIHRvIGtlZXAgdGhlIFBJUEUgcG93 ZXIgc3RhdGUgaW4gUDIgd2hpbGUgY29uZmlndXJpbmcKPj4+PiB0aGUgVHlwZS1DIFBIWSwgb3Ro ZXJ3aXNlLCBpdCBtYXkgY2F1c2Ugd2FpdGluZyBmb3IgdGhlIFBJUEUgcmVhZHkKPj4+PiB0aW1l b3V0LiBJbiB0aGlzIGNhc2UsIGlmIHdlIHBvd2VyIG9uIHRoZSBQSFlzIGFmdGVyIHRoZSBEV0Mz IGNvcmUKPj4+PiBpbml0aWFsaXphdGlvbiBpcyBkb25lLCB0aGUgY29yZSB3aWxsIGJlIHJlc2V0 IHRvIHVuaW5pdGlhbGl6ZWQKPj4+PiBzdGF0ZSBhZnRlciBwb3dlciBvbiB0aGUgUEhZcy4KPj4+ Pgo+Pj4+IEZpeCB0aGlzIGJ5IHBvd2VyaW5nIG9uIHRoZSBQSFlzIGJlZm9yZSBpbml0aWFsaXpp bmcgY29yZS4gQW5kCj4+Pj4gYmVjYXVzZSB0aGUgR1VJRCByZWdpc3RlciBtYXkgYWxzbyBiZSBy ZXNldCBpbiB0aGlzIGNhc2UsIHNvIHdlCj4+Pj4gbmVlZCB0byBjb25maWd1cmUgdGhlIEdVSUQg cmVnaXN0ZXIgYWZ0ZXIgcG93ZXJpbmcgb24gdGhlIFBIWXMuCj4+Pj4KPj4+PiBTaWduZWQtb2Zm LWJ5OiBXaWxsaWFtIFd1IDx3aWxsaWFtLnd1QHJvY2stY2hpcHMuY29tPgo+Pj4KPj4+IGRvZXMg dGhpcyBjYXVzZSBhbnkgcmVncmVzc2lvbnMgZm9yIHlvdXIgYm9hcmRzPwo+PiAKPj4gSSdtIG5v dCBSb2dlciwgYnV0IEkgYmVsaWV2ZSBpdCB3YXMgZGV0ZXJtaW5lZCB3ZSBkb24ndCBuZWVkIHRo aXMgZm9yCj4+IHRoZSBSb2NrY2hpcCBzeXN0ZW1zIGZvciB3aGljaCBXaWxsaWFtIHdhcyBvcmln aW5hbGx5IHNlbmRpbmcgdGhpcy4gQXQKPj4gbGVhc3Qgbm90IHJpZ2h0IG5vdy4gSSBiZWxpZXZl IG91ciBQSFkgaW5pdCBwcm9ibGVtcyB3ZXJlIG1vc3RseQo+PiByZXNvbHZlZCBpbiBvdGhlciB3 YXlzLgo+PiAKPj4gKEFsdGhvdWdoIEkgaGVhciBVU0IgaXMgY3VycmVudGx5IHByZXR0eSBicm9r ZW4gYXJvdW5kIHN1c3BlbmQvcmVzdW1lCj4+IGZvciB1cyBvbiAtbmV4dC4gTGlrZWx5IHVucmVs YXRlZC4pCj4+IAo+PiBJIGd1ZXNzIHdlIG5ldmVyIGNsZWFybHkgcmVwbGllZCBzdGF0aW5nIHRo ZSBhYm92ZS4gSSBob3BlIHRoaXMgaXNuJ3QKPj4gbWVyZ2VkIGFueXdoZXJlPyBPciBJIGd1ZXNz IGl0J3Mgbm8gcHJvYmxlbSB0byBtZSBhdCB0aGUgbW9tZW50LCBidXQgaXQKPj4gbWlnaHQgYmUg bmVlZGxlc3MgY2h1cm4uCj4+IAo+Cj4gSSBkaWQgc29tZSBxdWljayB0ZXN0cyBvbiBUSSBwbGF0 Zm9ybXMgYW5kIGRpZG4ndCBzZWUgYW55IGlzc3VlcyB3aXRoIHRoaXMgcGF0Y2guCj4gU2luY2Ug dGhpcyBwYXRjaCBpc24ndCByZWFsbHkgZml4aW5nIHlvdXIgcHJvYmxlbSBhbmQgd2UgZGlkbid0 IGhhdmUgYW55Cj4gcHJvYmxlbXMgdG8gc3RhcnQgd2l0aCBJJ2Qgc3VnZ2VzdCB0byBhdm9pZCB0 aGlzIGNodXJuIGZvciBub3cuCgpmYWlyIGVub3VnaCwgSSB3b24ndCBhcHBseSBpdCA6LSkK