From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47143) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V8tDC-0007ob-8v for qemu-devel@nongnu.org; Mon, 12 Aug 2013 10:35:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V8tD4-0001Sz-Mk for qemu-devel@nongnu.org; Mon, 12 Aug 2013 10:35:10 -0400 Received: from e33.co.us.ibm.com ([32.97.110.151]:54676) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V8tD4-0001OQ-Gk for qemu-devel@nongnu.org; Mon, 12 Aug 2013 10:35:02 -0400 Received: from /spool/local by e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 12 Aug 2013 08:35:01 -0600 Received: from d03relay03.boulder.ibm.com (d03relay03.boulder.ibm.com [9.17.195.228]) by d03dlp03.boulder.ibm.com (Postfix) with ESMTP id 957BE19D804A for ; Mon, 12 Aug 2013 08:34:42 -0600 (MDT) Received: from d03av06.boulder.ibm.com (d03av06.boulder.ibm.com [9.17.195.245]) by d03relay03.boulder.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r7CEYmtR125732 for ; Mon, 12 Aug 2013 08:34:51 -0600 Received: from d03av06.boulder.ibm.com (loopback [127.0.0.1]) by d03av06.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id r7CEbVG0001106 for ; Mon, 12 Aug 2013 08:37:32 -0600 From: Anthony Liguori In-Reply-To: <5c0f4c470f93a477cf12751a8106d728a3c319d8.1376049708.git.jan.kiszka@siemens.com> References: <5c0f4c470f93a477cf12751a8106d728a3c319d8.1376049708.git.jan.kiszka@siemens.com> Date: Mon, 12 Aug 2013 09:34:37 -0500 Message-ID: <871u5zhtaa.fsf@codemonkey.ws> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH for 1.6 1/2] memory: Provide separate handling of unassigned io ports accesses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka , qemu-devel Cc: Paolo Bonzini , Andreas =?utf-8?Q?F=C3=A4rber?= , Peter Maydell Jan Kiszka writes: > Accesses to unassigned io ports shall return -1 on read and be ignored > on write. Ensure these properties via dedicated ops, decoupling us from > the memory core's handling of unassigned accesses. > > Signed-off-by: Jan Kiszka Breaks the build (linux-user): LINK xtensa-softmmu/qemu-system-xtensa CC alpha-linux-user/exec.o In file included from /home/aliguori/git/qemu/include/hw/hw.h:11:0, from /home/aliguori/git/qemu/exec.c:30: /home/aliguori/git/qemu/include/exec/ioport.h:48:1: error: unknown type nam= e =E2=80=98MemoryRegionOps=E2=80=99 make[1]: *** [exec.o] Error 1 make: *** [subdir-alpha-linux-user] Error 2 Regards, Anthony Liguori > --- > exec.c | 3 ++- > include/exec/ioport.h | 2 ++ > ioport.c | 16 ++++++++++++++++ > 3 files changed, 20 insertions(+), 1 deletions(-) > > diff --git a/exec.c b/exec.c > index 3ca9381..9ed598f 100644 > --- a/exec.c > +++ b/exec.c > @@ -1820,7 +1820,8 @@ static void memory_map_init(void) > address_space_init(&address_space_memory, system_memory, "memory"); >=20=20 > system_io =3D g_malloc(sizeof(*system_io)); > - memory_region_init(system_io, NULL, "io", 65536); > + memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io= ", > + 65536); > address_space_init(&address_space_io, system_io, "I/O"); >=20=20 > memory_listener_register(&core_memory_listener, &address_space_memor= y); > diff --git a/include/exec/ioport.h b/include/exec/ioport.h > index bdd4e96..84f7f85 100644 > --- a/include/exec/ioport.h > +++ b/include/exec/ioport.h > @@ -45,6 +45,8 @@ typedef struct MemoryRegionPortio { >=20=20 > #define PORTIO_END_OF_LIST() { } >=20=20 > +extern const MemoryRegionOps unassigned_io_ops; > + > void cpu_outb(pio_addr_t addr, uint8_t val); > void cpu_outw(pio_addr_t addr, uint16_t val); > void cpu_outl(pio_addr_t addr, uint32_t val); > diff --git a/ioport.c b/ioport.c > index 79b7f1a..707cce8 100644 > --- a/ioport.c > +++ b/ioport.c > @@ -44,6 +44,22 @@ typedef struct MemoryRegionPortioList { > MemoryRegionPortio ports[]; > } MemoryRegionPortioList; >=20=20 > +static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned s= ize) > +{ > + return -1ULL; > +} > + > +static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val, > + unsigned size) > +{ > +} > + > +const MemoryRegionOps unassigned_io_ops =3D { > + .read =3D unassigned_io_read, > + .write =3D unassigned_io_write, > + .endianness =3D DEVICE_NATIVE_ENDIAN, > +}; > + > void cpu_outb(pio_addr_t addr, uint8_t val) > { > LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val); > --=20 > 1.7.3.4