Re: [PATCH v7 10/25] target/loongarch: call plugin trap callbacks

["Alex Bennée" <alex.bennee@linaro.org>]

Julian Ganz <neither@nut.email> writes:

> We recently introduced API for registering callbacks for trap related
> events as well as the corresponding hook functions. Due to differences
> between architectures, the latter need to be called from target specific
> code.
>
> This change places hooks for loongarch targets. This architecture
> has one special "exception" for interrupts and no host calls.
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Julian Ganz <neither@nut.email>
> ---
>  target/loongarch/cpu.c | 4 ++++
>  1 file changed, 4 insertions(+)

This fails to apply now - I think because the TCG functions have moved
to target/loongarch/tcg/tcg_cpu.c

>
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index 993602fb8c..a8299dfee6 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -32,6 +32,7 @@
>  #include "accel/tcg/cpu-ldst.h"
>  #include "accel/tcg/cpu-ops.h"
>  #include "tcg/tcg.h"
> +#include "qemu/plugin.h"
>  #endif
>  #include "tcg/tcg_loongarch.h"
>  
> @@ -172,6 +173,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
>      int cause = -1;
>      bool tlbfill = FIELD_EX64(env->CSR_TLBRERA, CSR_TLBRERA, ISTLBR);
>      uint32_t vec_size = FIELD_EX64(env->CSR_ECFG, CSR_ECFG, VS);
> +    uint64_t last_pc = env->pc;
>  
>      if (cs->exception_index != EXCCODE_INT) {
>          qemu_log_mask(CPU_LOG_INT,
> @@ -282,6 +284,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
>                        __func__, env->pc, env->CSR_ERA,
>                        cause, env->CSR_BADV, env->CSR_DERA, vector,
>                        env->CSR_ECFG, env->CSR_ESTAT);
> +        qemu_plugin_vcpu_interrupt_cb(cs, last_pc);
>      } else {
>          if (tlbfill) {
>              set_pc(env, env->CSR_TLBRENTRY);
> @@ -300,6 +303,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
>                        tlbfill ? env->CSR_TLBRBADV : env->CSR_BADV,
>                        env->CSR_BADI, env->gpr[11], cs->cpu_index,
>                        env->CSR_ASID);
> +        qemu_plugin_vcpu_exception_cb(cs, last_pc);
>      }
>      cs->exception_index = -1;
>  }

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro