From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1DC86C4321E for ; Wed, 30 Nov 2022 20:23:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 46E5F10E4DC; Wed, 30 Nov 2022 20:23:24 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 75D6710E4DC for ; Wed, 30 Nov 2022 20:23:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669839800; x=1701375800; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=blYSQDl1xDjuR7StGanvyKMW9Kp+wWq4FRPB0a5rkxI=; b=Ss4FqjxzipeBUSnUEay2S0L8LIPPMa9pEJ6Yz3qB7uWjYrRvemUwL8LG OS1Mm9Q6/P9N2SrDlI3ZrwDuXnLXWlaUvlYijUXtWVCLJlUwz2wYbg5z2 zAL/dbjpC9gAQsArePCzr/3BdmN7osAtb4q22OFfFnmiqRtvWaP6AOIdQ rpxnvnMfLl2zaX6bTLbcdzQuniqjmmx/kZ6xv/0mRAqueFU+JU0aWkG45 mlNLBbF/rYnxc6CV8tYm4bV452xGctYb5Gr+EiNPniF8xJB0za+gTknJ7 YFswYYzymy5cli/M1AoM8eQN6X7OpSRVc0TjD2gcBt4sxgsR2IhCDMJWN Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="379778828" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="379778828" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 12:23:19 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="712952162" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="712952162" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.147.254]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 12:23:18 -0800 Date: Wed, 30 Nov 2022 12:14:20 -0800 Message-ID: <8735a042ub.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa In-Reply-To: References: <20221129012146.995006-1-umesh.nerlige.ramappa@intel.com> <874juh43ce.wl-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add support for 32 bit OAG formats in MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, 30 Nov 2022 12:00:57 -0800, Umesh Nerlige Ramappa wrote: > > On Tue, Nov 29, 2022 at 05:51:13PM -0800, Dixit, Ashutosh wrote: > > On Mon, 28 Nov 2022 17:21:46 -0800, Umesh Nerlige Ramappa wrote: > >> > >> +/* > >> + * Ref: 14010536224: > >> + * 0x20cc is repurposed on MTL, so use a separate array for MTL. > > > > Wondering if it was WAIT_FOR_RC6_EXIT (seen in gen12_oa_mux_regs) which > > moved elsewhere and if that needs to be added to the array below too? > > WAIT_FOR_RC6_EXIT (0x20cc) moved elsewhere so it should be "removed" from > mtl oa mux array. What I was saying was let's say WAIT_FOR_RC6_EXIT moved to 0xc0ffee so now should 0xc0ffee be added to mtl_oa_mux_regs? > > > > >> + */ > >> +static const struct i915_range mtl_oa_mux_regs[] = { > >> + { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */ > >> + { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */ > >> + { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */ > >> + { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */ > >> +}; > >> + > >> static bool gen7_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) > >> { > >> return reg_in_range_table(addr, gen7_oa_b_counters); > >> @@ -4349,7 +4372,10 @@ static bool xehp_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) > >> > >> static bool gen12_is_valid_mux_addr(struct i915_perf *perf, u32 addr) > >> { > >> - return reg_in_range_table(addr, gen12_oa_mux_regs); > >> + if (IS_METEORLAKE(perf->i915)) > >> + return reg_in_range_table(addr, mtl_oa_mux_regs); > >> + else > >> + return reg_in_range_table(addr, gen12_oa_mux_regs); > > > > But otherwise this is: > > > > Reviewed-by: Ashutosh Dixit > > I will break them into separate patches though. If the diff is identical, I > will carry over your R-b on the split patches. Please let me know if that's > a concern. No I can quickly review again anyway. > > If you decide to split the patches, please add my R-b on all the split patches. Thanks. -- Ashutosh