From: Marc Zyngier <maz@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
Bjorn Helgaas <helgaas@kernel.org>,
Alex Williamson <alex.williamson@redhat.com>,
Kevin Tian <kevin.tian@intel.com>,
Jason Gunthorpe <jgg@nvidia.com>, Megha Dey <megha.dey@intel.com>,
Ashok Raj <ashok.raj@intel.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Andrew Cooper <amc96@cam.ac.uk>, Juergen Gross <jgross@suse.com>,
linux-pci@vger.kernel.org, xen-devel@lists.xenproject.org
Subject: Re: [patch 03/10] genirq/msi: Make MSI descriptor alloc/free ready for range allocations
Date: Sun, 28 Nov 2021 15:57:35 +0000 [thread overview]
Message-ID: <8735ngs26o.wl-maz@kernel.org> (raw)
In-Reply-To: <20211127000918.664542907@linutronix.de>
On Sat, 27 Nov 2021 01:24:34 +0000,
Thomas Gleixner <tglx@linutronix.de> wrote:
>
> Convert the MSI descriptor related functions to ranges and fixup the call
> sites.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> drivers/base/platform-msi.c | 3 ++-
> include/linux/msi.h | 7 ++++---
> kernel/irq/msi.c | 38 +++++++++++++++++++-------------------
> 3 files changed, 25 insertions(+), 23 deletions(-)
This particular patch breaks one of my test boxes when allocating the
MSIs for the first SMMUv3 it encounters:
[ 14.700206] arm-smmu-v3 arm-smmu-v3.0.auto: option mask 0x0
[ 14.705848] arm-smmu-v3 arm-smmu-v3.0.auto: ias 48-bit, oas 48-bit (features 0x00041fff)
[ 14.716184] arm-smmu-v3 arm-smmu-v3.0.auto: allocated 65536 entries for cmdq
[ 14.723285] arm-smmu-v3 arm-smmu-v3.0.auto: allocated 128 entries for evtq
[ 14.730170] arm-smmu-v3 arm-smmu-v3.0.auto: allocated 256 entries for priq
[ 41.282305] watchdog: BUG: soft lockup - CPU#43 stuck for 26s! [swapper/0:1]
[ 41.289383] Modules linked in:
[ 41.292430] irq event stamp: 3906684
[ 41.295994] hardirqs last enabled at (3906683): [<ffffb73f677c54d8>] ___slab_alloc+0x7c8/0x8c0
[ 41.304698] hardirqs last disabled at (3906684): [<ffffb73f6806d478>] el1_interrupt+0x38/0xb0
[ 41.313220] softirqs last enabled at (3798058): [<ffffb73f6746099c>] __do_softirq+0x40c/0x58c
[ 41.321825] softirqs last disabled at (3798053): [<ffffb73f674ee610>] __irq_exit_rcu+0x120/0x160
[ 41.330607] CPU: 43 PID: 1 Comm: swapper/0 Not tainted 5.16.0-rc2-00078-g76af42494903 #41
[ 41.338775] Hardware name: WIWYNN Mt.Jade Server System B81.030Z1.0007/Mt.Jade Motherboard, BIOS 1.3.20210110 2021/01/10
[ 41.349634] pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 41.356585] pc : lock_is_held_type+0x124/0x20c
[ 41.361019] lr : lock_is_held_type+0xe8/0x20c
[ 41.365365] sp : ffff80001051b840
[ 41.368669] pmr_save: 000000e0
[ 41.371712] x29: ffff80001051b840 x28: ffff000034d80000 x27: ffff07ff87606600
[ 41.378838] x26: 00000000000000e0 x25: 00000000ffffffff x24: ffffb73f68733d00
[ 41.385964] x23: 0000000000000028 x22: ffff07ff87606fb8 x21: ffffb73f68bffc38
[ 41.393090] x20: ffff07ff87606fe0 x19: 0000000000000002 x18: 0000000000000014
[ 41.400217] x17: 0000000076a13aac x16: 00000000486de301 x15: 00000000ed5ff5e1
[ 41.407342] x14: 00000000fda7b077 x13: 0000000000000006 x12: 00000000b82b73dd
[ 41.414468] x11: ffff07ff87606fb8 x10: ffffb73f6952d000 x9 : ffffb73f675a3750
[ 41.421594] x8 : 0000000000000000 x7 : ffffb73f68e16000 x6 : ffffb73f677c6d64
[ 41.428720] x5 : 0000000000000000 x4 : 0000000000000001 x3 : 000000000000ffff
[ 41.435846] x2 : ffff50ff17454000 x1 : 0000000000000000 x0 : 0000000000000000
[ 41.442972] Call trace:
[ 41.445407] lock_is_held_type+0x124/0x20c
[ 41.449494] rcu_read_lock_sched_held+0x68/0xac
[ 41.454018] trace_lock_acquire+0x78/0x1c0
[ 41.458107] lock_acquire+0x40/0x90
[ 41.461585] fs_reclaim_acquire+0x90/0x114
[ 41.465676] kmem_cache_alloc_trace+0x80/0x300
[ 41.470110] msi_add_simple_msi_descs+0x70/0x150
[ 41.474718] msi_domain_alloc_irqs_descs_locked+0x90/0xfc
[ 41.480106] msi_domain_alloc_irqs+0x58/0xa0
[ 41.484364] platform_msi_domain_alloc_irqs+0x5c/0xa0
[ 41.489410] arm_smmu_device_probe+0xfc0/0x1230
[ 41.493936] platform_probe+0x74/0xe4
[ 41.497590] really_probe+0xc4/0x470
[ 41.501156] __driver_probe_device+0x11c/0x190
[ 41.505589] driver_probe_device+0x48/0x110
[ 41.509761] __driver_attach+0xe0/0x200
[ 41.513585] bus_for_each_dev+0x7c/0xe0
[ 41.517412] driver_attach+0x30/0x3c
[ 41.520976] bus_add_driver+0x150/0x230
[ 41.524801] driver_register+0x84/0x140
[ 41.528626] __platform_driver_register+0x34/0x40
[ 41.533319] arm_smmu_driver_init+0x2c/0x38
[ 41.537496] do_one_initcall+0x80/0x3d0
[ 41.541321] kernel_init_freeable+0x318/0x3a0
[ 41.545672] kernel_init+0x30/0x14c
[ 41.549151] ret_from_fork+0x10/0x20
The issue seems to be originating in the previous patch, where the
following line was added:
+ struct msi_range range = { .first = 0, .last = UINT_MAX, .ndesc = nvec, };
In that context, only 'ndesc' was used, and that was fine.
However, in the current patch, ndesc use is removed, only first/last
are considered, and UINT_MAX is... a lot of MSIs.
This fixes it:
diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
index bef5b74a7268..a520bfd94a56 100644
--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -975,7 +975,7 @@ int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device
*/
int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec)
{
- struct msi_range range = { .first = 0, .last = UINT_MAX, .ndesc = nvec, };
+ struct msi_range range = { .first = 0, .last = nvec - 1, .ndesc = nvec, };
int ret;
msi_lock_descs(dev);
However, it'd be good to clarify the use of range->ndesc.
[...]
> --- a/kernel/irq/msi.c
> +++ b/kernel/irq/msi.c
> @@ -101,19 +101,19 @@ int msi_add_msi_desc(struct device *dev,
> *
> * Return: 0 on success or an appropriate failure code.
> */
> -static int msi_add_simple_msi_descs(struct device *dev, unsigned int index, unsigned int ndesc)
> +static int msi_add_simple_msi_descs(struct device *dev, struct msi_range *range)
nit: most of the functions changed in this patch need to have their
documentation tidied up.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-11-28 15:59 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-27 1:24 [patch 00/10] genirq/msi, PCI/MSI: Support for dynamic MSI-X vector expansion - Part 4 Thomas Gleixner
2021-11-27 1:24 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 01/10] genirq/msi: Add range argument to alloc/free MSI domain ops Thomas Gleixner
2021-11-27 1:24 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 02/10] genirq/msi: Add range argument to msi_domain_alloc/free_descs_locked() Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 03/10] genirq/msi: Make MSI descriptor alloc/free ready for range allocations Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
2021-11-28 15:57 ` Marc Zyngier [this message]
2021-11-28 19:17 ` Thomas Gleixner
2021-11-29 17:28 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 04/10] genirq/msi: Prepare MSI domain alloc/free for range irq allocation Thomas Gleixner
2021-11-27 1:24 ` Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 05/10] genirq/msi: Add domain info flag MSI_FLAG_CAN_EXPAND Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 06/10] PCI/MSI: Use range in allocation path Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 07/10] PCI/MSI: Make free related functions range based Thomas Gleixner
2021-11-27 1:24 ` Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 08/10] PCI/MSI: Provide pci_msi_domain_supports_expand() Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 09/10] PCI/MSI: Provide pci_msix_expand_vectors[_at]() Thomas Gleixner
2021-11-27 1:24 ` Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
2021-12-02 1:08 ` Dey, Megha
2021-12-02 10:16 ` Thomas Gleixner
2021-12-02 19:21 ` Raj, Ashok
2021-12-02 20:40 ` Thomas Gleixner
2021-12-03 0:45 ` Raj, Ashok
2021-12-03 12:29 ` Thomas Gleixner
2021-11-27 1:24 ` [patch 10/10] x86/apic/msi: Support MSI-X vector expansion Thomas Gleixner
2021-11-27 1:25 ` Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=8735ngs26o.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=alex.williamson@redhat.com \
--cc=amc96@cam.ac.uk \
--cc=ashok.raj@intel.com \
--cc=helgaas@kernel.org \
--cc=jgg@nvidia.com \
--cc=jgross@suse.com \
--cc=kevin.tian@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=megha.dey@intel.com \
--cc=mpe@ellerman.id.au \
--cc=tglx@linutronix.de \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.