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[95.120.215.139]) by smtp.gmail.com with ESMTPSA id x129sm14619422wmg.8.2019.10.11.05.22.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Oct 2019 05:22:03 -0700 (PDT) References: <20191011085611.4194-1-stefanha@redhat.com> <20191011085611.4194-3-stefanha@redhat.com> User-agent: mu4e 1.2.0; emacs 26.2 From: Sergio Lopez To: qemu-devel@nongnu.org, Stefan Hajnoczi Subject: Re: [PATCH v2 2/7] libqos: add iteration support to qpci_find_capability() In-reply-to: <20191011085611.4194-3-stefanha@redhat.com> Date: Fri, 11 Oct 2019 14:22:01 +0200 Message-ID: <8736fzcw0m.fsf@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Paolo Bonzini , Thomas Huth , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --=-=-= Content-Type: text/plain Content-Transfer-Encoding: quoted-printable Stefan Hajnoczi writes: > VIRTIO 1.0 PCI devices have multiple PCI_CAP_ID_VNDR capabilities so we > need a way to iterate over them. Extend qpci_find_capability() to take > the last address. > > Signed-off-by: Stefan Hajnoczi > --- > tests/libqos/pci.h | 2 +- > tests/libqos/pci.c | 18 ++++++++++++------ > 2 files changed, 13 insertions(+), 7 deletions(-) > > diff --git a/tests/libqos/pci.h b/tests/libqos/pci.h > index a5389a5845..590c175190 100644 > --- a/tests/libqos/pci.h > +++ b/tests/libqos/pci.h > @@ -86,7 +86,7 @@ bool qpci_has_buggy_msi(QPCIDevice *dev); > bool qpci_check_buggy_msi(QPCIDevice *dev); >=20=20 > void qpci_device_enable(QPCIDevice *dev); > -uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id); > +uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id, uint8_t start_= addr); > void qpci_msix_enable(QPCIDevice *dev); > void qpci_msix_disable(QPCIDevice *dev); > bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry); > diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c > index 662ee7a517..b8679dff1d 100644 > --- a/tests/libqos/pci.c > +++ b/tests/libqos/pci.c > @@ -115,10 +115,16 @@ void qpci_device_enable(QPCIDevice *dev) > g_assert_cmphex(cmd & PCI_COMMAND_MASTER, =3D=3D, PCI_COMMAND_MASTER= ); > } >=20=20 > -uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id) > +uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id, uint8_t start_= addr) > { > uint8_t cap; > - uint8_t addr =3D qpci_config_readb(dev, PCI_CAPABILITY_LIST); > + uint8_t addr; > + > + if (start_addr) { > + addr =3D qpci_config_readb(dev, start_addr + PCI_CAP_LIST_NEXT); > + } else { > + addr =3D qpci_config_readb(dev, PCI_CAPABILITY_LIST); > + } >=20=20 > do { > cap =3D qpci_config_readb(dev, addr); > @@ -138,7 +144,7 @@ void qpci_msix_enable(QPCIDevice *dev) > uint8_t bir_table; > uint8_t bir_pba; >=20=20 > - addr =3D qpci_find_capability(dev, PCI_CAP_ID_MSIX); > + addr =3D qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0); > g_assert_cmphex(addr, !=3D, 0); >=20=20 > val =3D qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); > @@ -167,7 +173,7 @@ void qpci_msix_disable(QPCIDevice *dev) > uint16_t val; >=20=20 > g_assert(dev->msix_enabled); > - addr =3D qpci_find_capability(dev, PCI_CAP_ID_MSIX); > + addr =3D qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0); > g_assert_cmphex(addr, !=3D, 0); > val =3D qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); > qpci_config_writew(dev, addr + PCI_MSIX_FLAGS, > @@ -203,7 +209,7 @@ bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry) > uint64_t vector_off =3D dev->msix_table_off + entry * PCI_MSIX_ENTRY= _SIZE; >=20=20 > g_assert(dev->msix_enabled); > - addr =3D qpci_find_capability(dev, PCI_CAP_ID_MSIX); > + addr =3D qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0); > g_assert_cmphex(addr, !=3D, 0); > val =3D qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); >=20=20 > @@ -221,7 +227,7 @@ uint16_t qpci_msix_table_size(QPCIDevice *dev) > uint8_t addr; > uint16_t control; >=20=20 > - addr =3D qpci_find_capability(dev, PCI_CAP_ID_MSIX); > + addr =3D qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0); > g_assert_cmphex(addr, !=3D, 0); >=20=20 > control =3D qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); Reviewed-by: Sergio Lopez --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEEvtX891EthoCRQuii9GknjS8MAjUFAl2gc+kACgkQ9GknjS8M AjXaMxAAhyPZsFtkBwQAN8uCiGRx5xPcdbntPiM9tGkdR4YmvK7ZOlzvXArtSVnz fSPhY/BkMwjG6v7E4aKFPeYNRmI9PsRiej5mh0TSV7hT1TleSDHsjmi+Koq9BIZp IcCatcYN/1bkiUhSsyLOIXA8tZZHdIqc2RxXrQsbeWGMVGIvbw2wxZrCzuBrhXUG Q6FroEnpE6ENhNAYfm577COpw/7ceekysDzYaFYCUC61sNLi3StfY/hu/dXQbtFv YMcToVKs3ruedaGLQJixhuT/yFDxQTqkYEzjcg5jDhWAC1Aok33jhZxeVKIXsq6U wn0Z6YpXH2ZR0eeRtRzJr4B3DxDyyD4tE0Lubvs/4aDtHWEsit/8L+s6g4ayCi1B 7zmHQLHY8cMDvkgYJImCvSODv70Rr7OE5/lylmW36lJpsyWhAznUjiz+7FPgULXu iSYmjmCV1X2t+99g0EbA/9FkiTgLj2v+OPRxI54httyvaqqypc+5P5yNBUSDU4ob KJT6xPW8PjGKYlaJT8CHvDVee3hK6K6BUk5VaJpcEZ8M4ZDf7R3XGHU+juVY3PzQ w9+++CU0QR2pc3XQ15ndaz1VajDzcYjvYugXsNLgzPJ4PkD0YSI7Ml4QJcn6iCgd 1jbWToPncLPsWVH49FClbimi7adxg2mHBt4q9SKiNWUSPd2qwRE= =3gcU -----END PGP SIGNATURE----- --=-=-=--