All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc/mm: Fix lazy icache flush on pre-POWER5
Date: Tue, 29 Nov 2016 08:25:37 +0530	[thread overview]
Message-ID: <8737ibm1ue.fsf@linux.vnet.ibm.com> (raw)
In-Reply-To: <1480385626.11342.53.camel@kernel.crashing.org>

Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:

> On 64-bit CPUs with no-execute support and non-snooping icache, such as
> 970 or POWER4, we have a software mechanism to ensure coherency of the
> cache (using exec faults when needed).
>
> This was broken due to a logic inversion when that code was rewritten
> from assembly to C.

The asm code for reference is

BEGIN_FTR_SECTION
       mr      r4,r30
       mr      r5,r7
       bl      hash_page_do_lazy_icache
END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)


Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>

>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Fixes: 91f1da99792a1d133df94c4753510305353064a1
> Fixes: 89ff725051d177556b23d80f2a30f880a657a6c1
> Fixes: a43c0eb8364c022725df586e91dd753633374d66
> --
> diff --git a/arch/powerpc/mm/hash64_4k.c b/arch/powerpc/mm/hash64_4k.c
> index 42c702b..6fa450c 100644
> --- a/arch/powerpc/mm/hash64_4k.c
> +++ b/arch/powerpc/mm/hash64_4k.c
> @@ -55,7 +55,7 @@ int __hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
>  	 */
>  	rflags = htab_convert_pte_flags(new_pte);
>
> -	if (!cpu_has_feature(CPU_FTR_NOEXECUTE) &&
> +	if (cpu_has_feature(CPU_FTR_NOEXECUTE) &&
>  	    !cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
>  		rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);
>
> diff --git a/arch/powerpc/mm/hash64_64k.c b/arch/powerpc/mm/hash64_64k.c
> index 3bbbea0..1a68cb1 100644
> --- a/arch/powerpc/mm/hash64_64k.c
> +++ b/arch/powerpc/mm/hash64_64k.c
> @@ -87,7 +87,7 @@ int __hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
>  	subpg_pte = new_pte & ~subpg_prot;
>  	rflags = htab_convert_pte_flags(subpg_pte);
>
> -	if (!cpu_has_feature(CPU_FTR_NOEXECUTE) &&
> +	if (cpu_has_feature(CPU_FTR_NOEXECUTE) &&
>  	    !cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) {
>
>  		/*
> @@ -258,7 +258,7 @@ int __hash_page_64K(unsigned long ea, unsigned long access,
>
>  	rflags = htab_convert_pte_flags(new_pte);
>
> -	if (!cpu_has_feature(CPU_FTR_NOEXECUTE) &&
> +	if (cpu_has_feature(CPU_FTR_NOEXECUTE) &&
>  	    !cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
>  		rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);

  reply	other threads:[~2016-11-29  2:55 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-29  2:13 [PATCH] powerpc/mm: Fix lazy icache flush on pre-POWER5 Benjamin Herrenschmidt
2016-11-29  2:55 ` Aneesh Kumar K.V [this message]
2016-11-30 12:27 ` Michael Ellerman

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8737ibm1ue.fsf@linux.vnet.ibm.com \
    --to=aneesh.kumar@linux.vnet.ibm.com \
    --cc=benh@kernel.crashing.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.