From: Peter Korsgaard <jacmet@sunsite.dk>
To: John Linn <john.linn@xilinx.com>
Cc: linux-serial@vger.kernel.org, grant.likely@secretlab.ca,
michal.simek@petalogix.com, john.williams@petalogix.com
Subject: Re: [PATCH] uartlite: move from byte accesses to word accesses
Date: Wed, 20 Jan 2010 20:23:43 +0100 [thread overview]
Message-ID: <873a20mvgg.fsf@macbook.be.48ers.dk> (raw)
In-Reply-To: <28287b91-411c-4ae6-82b8-ec02a9d8e75d@SG2EHSMHS006.ehs.local> (John Linn's message of "Wed, 20 Jan 2010 09:45:21 -0700")
>>>>> "John" == John Linn <john.linn@xilinx.com> writes:
John> From: XAQ IP Librarian <abq_iplib@xaqiptest40.(none)>
John> Byte accesses for I/O devices in Xilinx IP is going to be less
John> desired in the future such that the driver is being changed to
John> use 32 bit accesses.
Why is it less desired?
Back when I wrote the driver, I used 8bit access on purpose to be
independent of register widths / endianess.
We have used the driver on systems where (something looking like) a
uartlite was behind a 16bit bus, so doing 32bit accesses would require
double the bus accesses.
Btw, the abq_iplib@xaqiptest40 address is (obviously) invalid.
--
Bye, Peter Korsgaard
next prev parent reply other threads:[~2010-01-20 19:23 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-20 16:45 [PATCH] uartlite: move from byte accesses to word accesses John Linn
2010-01-20 19:23 ` Peter Korsgaard [this message]
2010-01-20 21:49 ` John Linn
2010-01-20 22:53 ` Peter Korsgaard
2010-01-20 22:57 ` John Linn
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