From: Kevin Hilman <khilman@deeprootsystems.com>
To: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>,
Kalle Jokiniemi <kalle.jokiniemi@digia.com>,
linux-omap@vger.kernel.org
Subject: Re: [PATCH] OMAP3: PM: Fix the pwrdm_enable/disable_hdwr_sar funcs
Date: Fri, 05 Jun 2009 15:53:48 -0700 [thread overview]
Message-ID: <873aae70n7.fsf@deeprootsystems.com> (raw)
In-Reply-To: <alpine.DEB.2.00.0906051642370.6425@utopia.booyaka.com> (Paul Walmsley's message of "Fri\, 5 Jun 2009 16\:44\:37 -0600 \(MDT\)")
Paul Walmsley <paul@pwsan.com> writes:
> On Fri, 5 Jun 2009, Kevin Hilman wrote:
>
>> Rajendra Nayak <rnayak@ti.com> writes:
>>
>> > The pwrdm_enable_hdwr_sar/pwrdm_disable_hdwr_sar do not
>> > actually set/reset the SAVEANDRESTORE bit in the PWSTCTRL
>> > register but modify some other bit instead.
>> > This happens due to the OMAP3430ES2_SAVEANDRESTORE_SHIFT
>> > being defined as (1 << 4) instead of just 4.
>> >
>> > Signed-off-by: Rajendra Nayak <rnayak@ti.com>
>>
>> Thanks, pushing to PM branch.
>>
>> I'll wait to hear from Kalle if we can revert his previous patch
>> for this.
>
> I think Kalle covered this one already:
>
> http://patchwork.kernel.org/patch/15586/
... but was missing from PM branch. Remedied now.
But we also have a patch in the PM branch[1] which disables the
USBHOST SAR by removing the HAS_HDWR_SAR flag for the pwrdm.
I'm gessing/hoping that fixing this shift value allows us to
revert that patch and am hoping for some confirmation from
Kalle.
Kevin
[1] http://git.kernel.org/?p=linux/kernel/git/khilman/linux-omap-pm.git;a=commit;h=942fc93ce6b5ec7999f7864f6bb088cc8f308f45
next prev parent reply other threads:[~2009-06-05 22:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-05 13:00 [PATCH] OMAP3: PM: Fix the pwrdm_enable/disable_hdwr_sar funcs Rajendra Nayak
2009-06-05 22:10 ` Kevin Hilman
2009-06-05 22:44 ` Paul Walmsley
2009-06-05 22:53 ` Kevin Hilman [this message]
2009-06-08 7:57 ` VS: " Jokiniemi Kalle
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