From: Gustavo Sousa <gustavo.sousa@intel.com>
To: <I915-ci-infra@lists.freedesktop.org>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: ✗ Xe.CI.FULL: failure for drm/xe: Clean up adjust_idledly() and implement Wa_16031259911 (rev3)
Date: Mon, 9 Nov 2026 20:11:23 -0300 [thread overview]
Message-ID: <874idp38is.fsf@intel.com> (raw)
In-Reply-To: <179401782182.135328.5018409420848239130@221881a7231d>
Patchwork <patchwork@emeril.freedesktop.org> writes:
> == Series Details ==
>
> Series: drm/xe: Clean up adjust_idledly() and implement Wa_16031259911 (rev3)
> URL : https://patchwork.freedesktop.org/series/176761/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from xe-6074-be7a4fe8d1795219f7d033830ec4cf6e8ca1ecdb_FULL -> xe-pw-176761v3_FULL
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with xe-pw-176761v3_FULL absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in xe-pw-176761v3_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Participating hosts (3 -> 3)
> ------------------------------
>
> No changes in participating hosts
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in xe-pw-176761v3_FULL:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
> - shard-lnl: [PASS][1] -> [SKIP][2]
> [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6074-be7a4fe8d1795219f7d033830ec4cf6e8ca1ecdb/shard-lnl-8/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
> [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176761v3/shard-lnl-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
The skip is unrelated to changes to adjust_idledly().
>
> * igt@xe_pm_residency@gt-c6-freeze:
> - shard-ptl: NOTRUN -> [ABORT][3] +1 other test abort
> [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-176761v3/shard-ptl-2/igt@xe_pm_residency@gt-c6-freeze.html
The subtest is actually passing. This could be related to
https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/2625.
--
Gustavo Sousa
next prev parent reply other threads:[~2026-11-09 23:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 23:31 [PATCH v3 00/10] drm/xe: Clean up adjust_idledly() and implement Wa_16031259911 Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 01/10] drm/xe: Bail from adjust_idledly() if in VF mode Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 02/10] drm/xe: Sync Wa_16023105232 in xe_was to match OOB rule Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 03/10] drm/xe: Use picosecond as common unit in adjust_idledly() Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 04/10] drm/xe: Factor out {min,max}_idledly_ps " Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 05/10] drm/xe: Bail from adjust_idledly() if no applicable workaround Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 06/10] drm/xe: Drop early and redundant workaround checks in adjust_idledly() Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 07/10] drm/xe: Replace MAXCNT comment with a comment on adjust_idledly() Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 08/10] drm/xe/guc: Increment regset size for Wa_1607983814 inside hwe loop Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 09/10] drm/xe/guc: Increment regset size for RING_IDLEDLY workarounds Gustavo Sousa
2026-11-05 23:31 ` [PATCH v3 10/10] drm/xe: Implement Wa_16031259911 Gustavo Sousa
2026-11-05 23:39 ` ✗ CI.checkpatch: warning for drm/xe: Clean up adjust_idledly() and implement Wa_16031259911 (rev3) Patchwork
2026-11-05 23:41 ` ✓ CI.KUnit: success " Patchwork
2026-11-06 0:23 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-07 2:17 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-11-09 23:11 ` Gustavo Sousa [this message]
2026-11-09 23:50 ` [PATCH v3 00/10] drm/xe: Clean up adjust_idledly() and implement Wa_16031259911 Gustavo Sousa
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