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From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Kandpal, Suraj" <suraj.kandpal@intel.com>,
	"Atwood, Matthew S" <matthew.s.atwood@intel.com>,
	"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Atwood, Matthew S" <matthew.s.atwood@intel.com>
Subject: RE: [PATCH 06/10] drm/i915/xe3lpd: Add macro to choose HDCP_LINE_REKEY bit
Date: Thu, 10 Oct 2024 11:09:34 +0300	[thread overview]
Message-ID: <874j5k8jlt.fsf@intel.com> (raw)
In-Reply-To: <SN7PR11MB6750E5110E8FC97C456AB36DE3782@SN7PR11MB6750.namprd11.prod.outlook.com>

On Thu, 10 Oct 2024, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> -----Original Message-----
>> From: Jani Nikula <jani.nikula@linux.intel.com>
>> Sent: Wednesday, October 9, 2024 1:09 PM
>> To: Atwood, Matthew S <matthew.s.atwood@intel.com>; intel-
>> xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
>> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; Atwood, Matthew S
>> <matthew.s.atwood@intel.com>
>> Subject: Re: [PATCH 06/10] drm/i915/xe3lpd: Add macro to choose
>> HDCP_LINE_REKEY bit
>> 
>> On Tue, 08 Oct 2024, Matt Atwood <matthew.s.atwood@intel.com> wrote:
>> > From: Suraj Kandpal <suraj.kandpal@intel.com>
>> >
>> > DISPLAY_VER() >= 30 has the HDCP_LINE_REKEY bit redefined from bit 12
>> > to bit 14. Create a macro to choose the correct bit based on
>> > DISPLAY_VER().
>> >
>> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
>> > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_hdcp.c | 5 +++--
>> >  drivers/gpu/drm/i915/i915_reg.h           | 2 +-
>> >  2 files changed, 4 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
>> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
>> > index ed6aa87403e2..e9b0414590ce 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
>> > @@ -47,10 +47,11 @@ intel_hdcp_disable_hdcp_line_rekeying(struct
>> intel_encoder *encoder,
>> >  			intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp-
>> >cpu_transcoder),
>> >  				     0, HDCP_LINE_REKEY_DISABLE);
>> >  		else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1), STEP_B0,
>> STEP_FOREVER) ||
>> > -			 IS_DISPLAY_VER_STEP(display, IP_VER(20, 0),
>> STEP_B0, STEP_FOREVER))
>> > +			 IS_DISPLAY_VER_STEP(display, IP_VER(20, 0),
>> STEP_B0, STEP_FOREVER) ||
>> > +			 DISPLAY_VER(display) >= 30)
>> >  			intel_de_rmw(display,
>> >  				     TRANS_DDI_FUNC_CTL(display, hdcp-
>> >cpu_transcoder),
>> > -				     0,
>> TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
>> > +				     0,
>> TRANS_DDI_HDCP_LINE_REKEY_DISABLE(display));
>> >  	}
>> >  }
>> >
>> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
>> > b/drivers/gpu/drm/i915/i915_reg.h index d30459f8d1cb..da65500cd0c8
>> > 100644
>> > --- a/drivers/gpu/drm/i915/i915_reg.h
>> > +++ b/drivers/gpu/drm/i915/i915_reg.h
>> > @@ -3832,7 +3832,7 @@ enum skl_power_gate {
>> >  #define  TRANS_DDI_EDP_INPUT_B_ONOFF	(5 << 12)
>> >  #define  TRANS_DDI_EDP_INPUT_C_ONOFF	(6 << 12)
>> >  #define  TRANS_DDI_EDP_INPUT_D_ONOFF	(7 << 12)
>> > -#define  TRANS_DDI_HDCP_LINE_REKEY_DISABLE	REG_BIT(12)
>> > +#define  TRANS_DDI_HDCP_LINE_REKEY_DISABLE(display)
>> 	(DISPLAY_VER(display) >= 30 ? REG_BIT(15) : REG_BIT(12))
>> 
>> Do we really want to extend this style to individual bits?
>
> I just thought this might be cleaner should we use 
> TRANS_DDI_HDCP_LINE_REKEY_DISABLE
> And 
> XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE instead then?

I think so yes.

If it becomes too ugly in code, at the very least define the bits
separately instead of inline in the ternary operator.

BR,
Jani.


>
> Regards,
> Suraj Kandpal
>
>> 
>> BR,
>> Jani.
>> 
>> >  #define  TRANS_DDI_MST_TRANSPORT_SELECT_MASK
>> 	REG_GENMASK(11, 10)
>> >  #define  TRANS_DDI_MST_TRANSPORT_SELECT(trans)	\
>> >  	REG_FIELD_PREP(TRANS_DDI_MST_TRANSPORT_SELECT_MASK,
>> trans)
>> 
>> --
>> Jani Nikula, Intel

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-10-10  8:09 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-08 22:37 [PATCH 00/10] Add xe3lpd edp enabling Matt Atwood
2024-10-08 22:37 ` [PATCH 01/10] drm/i915/xe3lpd: reuse xe2lpd definition Matt Atwood
2024-10-08 23:17   ` Matt Roper
2024-10-08 22:37 ` [PATCH 02/10] drm/i915/xe3lpd: Adjust watermark calculations Matt Atwood
2024-10-09 10:53   ` Govindapillai, Vinod
2024-10-08 22:37 ` [PATCH 03/10] drm/i915/xe3lpd: Add new display power wells Matt Atwood
2024-10-09  8:51   ` Luca Coelho
2024-10-08 22:37 ` [PATCH 04/10] drm/i915/xe3lpd: Update pmdemand programming Matt Atwood
2024-10-09 13:09   ` Govindapillai, Vinod
2024-10-09 13:53     ` Gustavo Sousa
2024-10-08 22:37 ` [PATCH 05/10] drm/i915/xe3lpd: Add cdclk changes Matt Atwood
2024-10-08 23:30   ` Matt Roper
2024-10-08 22:37 ` [PATCH 06/10] drm/i915/xe3lpd: Add macro to choose HDCP_LINE_REKEY bit Matt Atwood
2024-10-08 23:37   ` Matt Roper
2024-10-10  4:14     ` Kandpal, Suraj
2024-10-09  7:39   ` Jani Nikula
2024-10-10  4:17     ` Kandpal, Suraj
2024-10-10  8:09       ` Jani Nikula [this message]
2024-10-08 22:37 ` [PATCH 07/10] drm/i915/xe3lpd: Add C20 Phy consolidated programming table Matt Atwood
2024-10-09 20:32   ` Taylor, Clinton A
2024-10-08 22:37 ` [PATCH 08/10] drm/i915/xe3lpd: Add new bit range of MAX swing setup Matt Atwood
2024-10-09  6:13   ` Chauhan, Shekhar
2024-10-09  7:41   ` Jani Nikula
2024-10-08 22:37 ` [PATCH 09/10] drm/i915/xe3lpd: Add check to see if edp over type c is allowed Matt Atwood
2024-10-09  7:53   ` Jani Nikula
2024-10-09 23:06     ` Matt Atwood
2024-10-10  4:46       ` Kandpal, Suraj
2024-10-10  8:20         ` Jani Nikula
2024-10-08 22:37 ` [PATCH 10/10] drm/i915/xe3lpd: Add powerdown value of eDP over type c Matt Atwood
2024-10-09  5:57   ` Chauhan, Shekhar
2024-10-09  7:57   ` Jani Nikula
2024-10-09 23:05     ` Matt Atwood
2024-10-10  3:37       ` Kandpal, Suraj
2024-10-08 22:43 ` ✓ CI.Patch_applied: success for Add xe3lpd edp enabling Patchwork
2024-10-08 22:43 ` ✗ CI.checkpatch: warning " Patchwork
2024-10-08 22:56 ` ✓ CI.Build: success " Patchwork
2024-10-08 22:58 ` ✓ CI.Hooks: " Patchwork
2024-10-08 23:00 ` ✗ CI.checksparse: warning " Patchwork
2024-10-08 23:25 ` ✓ CI.BAT: success " Patchwork
2024-10-08 23:51 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2024-10-08 23:51 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-08 23:59 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-09  7:16 ` ✗ CI.FULL: failure " Patchwork

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