From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7994D206946; Thu, 10 Oct 2024 08:04:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728547460; cv=none; b=dvqrejizCTR83igO2DsW57FdFabgVseUxctVZZSNnjv2nBd/5kO2+FEeLXw0FzEknW90wqLpdC+CHVc+DIATHj6jIQgrIQQO60otAgJZpgKDlc3LlwxxtAiHI7nrzWk4h5jAlkG1YZ5zzkJLoh/oBeGTakv2KKinVm3e3xw8PME= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728547460; c=relaxed/simple; bh=/sPjONB6CQOWKqaEkTr091Qaj+RDE7ndBBvYW3Bh2BM=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=qyevNBsbYDv2j8bXl30Qwc3z/J7JSE3MpzbI5puQNT41Kd5mkmFY2GVOaywQeITzZm7aboYJy3YEDWL9jThmsIbjx33gie2wuISIm1TPXkgnDx8DQeb9HBgknk5inaINfKG2NM6i9JLg9FsPcUgOwKAXoM7th/fu+J0pq3URGhM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GSGLl4m7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GSGLl4m7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0A84BC4CEC5; Thu, 10 Oct 2024 08:04:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1728547460; bh=/sPjONB6CQOWKqaEkTr091Qaj+RDE7ndBBvYW3Bh2BM=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=GSGLl4m7u+63lOWLSQy58K/xA305lnd0eyLzq5D5XShfkul4Bz76BrRsijwnCr/Eh KUH+GIr1XZNofMm2pWElsNhoKe57BXi9rncUF1DMJB5+VNNy8IONse+pMTFGJ9K4CA jyPiSDZtY5uATSekW8FTvm1r36fEWzxA151fh+a0nK6pQuSJHgqQOBPLcgkSBCD5qy Ry4KbWqgHe9+z1nn5UEBH4WYL2ENyrnYkT9Z+OyWcAjRtif2beerNGAD6KHLzae/gb eSbRkFWX6FfYCcXOpzT/NkLzIBJNCihqkyFf0QO1z6sQva2PH6ItOVETqG6MB6q1G5 K0pWaS48bdBYw== Received: from [82.132.186.234] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1syo9h-0025s6-DA; Thu, 10 Oct 2024 09:04:17 +0100 Date: Thu, 10 Oct 2024 09:04:11 +0100 Message-ID: <874j5kv0xw.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Joey Gouly , Suzuki K Poulose , Zenghui Yu , Alexandru Elisei , Mark Brown Subject: Re: [PATCH v4 20/36] KVM: arm64: Disable hierarchical permissions when S1PIE is enabled In-Reply-To: References: <20241009190019.3222687-1-maz@kernel.org> <20241009190019.3222687-21-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 82.132.186.234 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, alexandru.elisei@arm.com, broonie@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 10 Oct 2024 08:33:13 +0100, Oliver Upton wrote: > > On Wed, Oct 09, 2024 at 08:00:03PM +0100, Marc Zyngier wrote: > > S1PIE implicitly disables hierarchical permissions, as specified in > > R_JHSVW, by making TCR_ELx.HPDn RES1. > > > > Add a predicate for S1PIE being enabled for a given translation regime, > > and emulate this behaviour by forcing the hpd field to true if S1PIE > > is enabled for that translation regime. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/at.c | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c > > index adcfce3f67f03..f5bd750288ff5 100644 > > --- a/arch/arm64/kvm/at.c > > +++ b/arch/arm64/kvm/at.c > > @@ -93,6 +93,23 @@ static enum trans_regime compute_translation_regime(struct kvm_vcpu *vcpu, u32 o > > } > > } > > > > +static bool s1pie_enabled(struct kvm_vcpu *vcpu, enum trans_regime regime) > > +{ > > + if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR3_EL1, S1PIE, IMP)) > > + return false; > > + > > + switch (regime) { > > + case TR_EL2: > > + case TR_EL20: > > + return vcpu_read_sys_reg(vcpu, TCR2_EL2) & TCR2_EL2_PIE; > > + case TR_EL10: > > + return (__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_TCR2En) && > > + (__vcpu_sys_reg(vcpu, TCR2_EL1) & TCR2_EL1x_PIE); > > + default: > > + BUG(); > > BUILD_BUG()? Doesn't work. regime is fished out of the walk_info structure, meaning that it is pretty opaque to the compiler, which in turn needs to emit code for all cases. Thanks, M. -- Without deviation from the norm, progress is not possible.