Re: [Intel-gfx] [PATCH] drm/i915/gt: rename DBG() to GTT_TRACE()

[Jani Nikula <jani.nikula@intel.com>]

On Mon, 11 Sep 2023, Jani Nikula <jani.nikula@intel.com> wrote:
> On Mon, 11 Sep 2023, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
>> On Mon, Sep 11, 2023 at 03:33:05PM +0300, Jani Nikula wrote:
>>>intel_gtt.h is indirectly included absolutely everywhere in the
>>>driver. DBG() is too short a name. Rename it GTT_TRACE() after
>>>GEM_TRACE().
>>>
>>>Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>>>---
>>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 36 ++++++++++++++--------------
>>
>> I like the new name. However since this is the only file actually using
>> it, why not move the define there too?
>
> Heh, I did that at first, but then moved it back, undecided.
>
> Maybe you can send a patch on top moving it. ;D
>
>>
>> Other than that,
>>
>> 	Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

And pushed, thanks for the review.

BR,
Jani.

>
> Thanks,
> Jani.
>
>>
>> thanks
>> Lucas De Marchi
>>
>>> drivers/gpu/drm/i915/gt/intel_gtt.h  |  4 ++--
>>> 2 files changed, 20 insertions(+), 20 deletions(-)
>>>
>>>diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>>>index c8568e5d1147..9895e18df043 100644
>>>--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>>>+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>>>@@ -242,9 +242,9 @@ static u64 __gen8_ppgtt_clear(struct i915_address_space * const vm,
>>> 	GEM_BUG_ON(end > vm->total >> GEN8_PTE_SHIFT);
>>>
>>> 	len = gen8_pd_range(start, end, lvl--, &idx);
>>>-	DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n",
>>>-	    __func__, vm, lvl + 1, start, end,
>>>-	    idx, len, atomic_read(px_used(pd)));
>>>+	GTT_TRACE("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n",
>>>+		  __func__, vm, lvl + 1, start, end,
>>>+		  idx, len, atomic_read(px_used(pd)));
>>> 	GEM_BUG_ON(!len || len >= atomic_read(px_used(pd)));
>>>
>>> 	do {
>>>@@ -252,8 +252,8 @@ static u64 __gen8_ppgtt_clear(struct i915_address_space * const vm,
>>>
>>> 		if (atomic_fetch_inc(&pt->used) >> gen8_pd_shift(1) &&
>>> 		    gen8_pd_contains(start, end, lvl)) {
>>>-			DBG("%s(%p):{ lvl:%d, idx:%d, start:%llx, end:%llx } removing pd\n",
>>>-			    __func__, vm, lvl + 1, idx, start, end);
>>>+			GTT_TRACE("%s(%p):{ lvl:%d, idx:%d, start:%llx, end:%llx } removing pd\n",
>>>+				  __func__, vm, lvl + 1, idx, start, end);
>>> 			clear_pd_entry(pd, idx, scratch);
>>> 			__gen8_ppgtt_cleanup(vm, as_pd(pt), I915_PDES, lvl);
>>> 			start += (u64)I915_PDES << gen8_pd_shift(lvl);
>>>@@ -270,10 +270,10 @@ static u64 __gen8_ppgtt_clear(struct i915_address_space * const vm,
>>> 			u64 *vaddr;
>>>
>>> 			count = gen8_pt_count(start, end);
>>>-			DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } removing pte\n",
>>>-			    __func__, vm, lvl, start, end,
>>>-			    gen8_pd_index(start, 0), count,
>>>-			    atomic_read(&pt->used));
>>>+			GTT_TRACE("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } removing pte\n",
>>>+				  __func__, vm, lvl, start, end,
>>>+				  gen8_pd_index(start, 0), count,
>>>+				  atomic_read(&pt->used));
>>> 			GEM_BUG_ON(!count || count >= atomic_read(&pt->used));
>>>
>>> 			num_ptes = count;
>>>@@ -325,9 +325,9 @@ static void __gen8_ppgtt_alloc(struct i915_address_space * const vm,
>>> 	GEM_BUG_ON(end > vm->total >> GEN8_PTE_SHIFT);
>>>
>>> 	len = gen8_pd_range(*start, end, lvl--, &idx);
>>>-	DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n",
>>>-	    __func__, vm, lvl + 1, *start, end,
>>>-	    idx, len, atomic_read(px_used(pd)));
>>>+	GTT_TRACE("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n",
>>>+		  __func__, vm, lvl + 1, *start, end,
>>>+		  idx, len, atomic_read(px_used(pd)));
>>> 	GEM_BUG_ON(!len || (idx + len - 1) >> gen8_pd_shift(1));
>>>
>>> 	spin_lock(&pd->lock);
>>>@@ -338,8 +338,8 @@ static void __gen8_ppgtt_alloc(struct i915_address_space * const vm,
>>> 		if (!pt) {
>>> 			spin_unlock(&pd->lock);
>>>
>>>-			DBG("%s(%p):{ lvl:%d, idx:%d } allocating new tree\n",
>>>-			    __func__, vm, lvl + 1, idx);
>>>+			GTT_TRACE("%s(%p):{ lvl:%d, idx:%d } allocating new tree\n",
>>>+				  __func__, vm, lvl + 1, idx);
>>>
>>> 			pt = stash->pt[!!lvl];
>>> 			__i915_gem_object_pin_pages(pt->base);
>>>@@ -369,10 +369,10 @@ static void __gen8_ppgtt_alloc(struct i915_address_space * const vm,
>>> 		} else {
>>> 			unsigned int count = gen8_pt_count(*start, end);
>>>
>>>-			DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } inserting pte\n",
>>>-			    __func__, vm, lvl, *start, end,
>>>-			    gen8_pd_index(*start, 0), count,
>>>-			    atomic_read(&pt->used));
>>>+			GTT_TRACE("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } inserting pte\n",
>>>+				  __func__, vm, lvl, *start, end,
>>>+				  gen8_pd_index(*start, 0), count,
>>>+				  atomic_read(&pt->used));
>>>
>>> 			atomic_add(count, &pt->used);
>>> 			/* All other pdes may be simultaneously removed */
>>>diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
>>>index 4d6296cdbcfd..346ec8ec2edd 100644
>>>--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
>>>+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
>>>@@ -35,9 +35,9 @@
>>> #define I915_GFP_ALLOW_FAIL (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
>>>
>>> #if IS_ENABLED(CONFIG_DRM_I915_TRACE_GTT)
>>>-#define DBG(...) trace_printk(__VA_ARGS__)
>>>+#define GTT_TRACE(...) trace_printk(__VA_ARGS__)
>>> #else
>>>-#define DBG(...)
>>>+#define GTT_TRACE(...)
>>> #endif
>>>
>>> #define NALLOC 3 /* 1 normal, 1 for concurrent threads, 1 for preallocation */
>>>-- 
>>>2.39.2
>>>

-- 
Jani Nikula, Intel