From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39807C4167B for ; Wed, 30 Nov 2022 01:51:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4ABA210E406; Wed, 30 Nov 2022 01:51:40 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id A098110E406 for ; Wed, 30 Nov 2022 01:51:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669773098; x=1701309098; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=AW93Fiuyrwa4acT5yfAG8uG7JBOZPTJezXd+MRBmhLY=; b=WfLgXhSuTJA5zJdnxA+qIinsGeRO4kI+uIpicsSNuk4KOplpbPo9NU5J RjWe8K/J1kp7lrh5gQzUbay/haVE9v2nIDneLExCMUi+NPi1wv6I+9k3c EU35hByAg92lKH6IyRwmaQDJsSctBc75mF66N8poGeIuguN44BbK1OHqE YMKHc/Y3ApZvBQR9b73UcTYzC11rya50yWCBbMGlWzI+UEv+01UuPhIAo UUp5zYLGgaFz/CFgAAy+9gneMMOz1zU2zT6vUbcQoTjyTphLdVUVEuJI4 FZUgxAAULl+JIEdYGZTCi9mTSl5+R1bygISiJaUVqlkg9OZ/36bbPz2Qf Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="401561578" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="401561578" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 17:51:37 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="621697055" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="621697055" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.209.22.21]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 17:51:37 -0800 Date: Tue, 29 Nov 2022 17:51:13 -0800 Message-ID: <874juh43ce.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa In-Reply-To: <20221129012146.995006-1-umesh.nerlige.ramappa@intel.com> References: <20221129012146.995006-1-umesh.nerlige.ramappa@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add support for 32 bit OAG formats in MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 28 Nov 2022 17:21:46 -0800, Umesh Nerlige Ramappa wrote: > > +/* > + * Ref: 14010536224: > + * 0x20cc is repurposed on MTL, so use a separate array for MTL. Wondering if it was WAIT_FOR_RC6_EXIT (seen in gen12_oa_mux_regs) which moved elsewhere and if that needs to be added to the array below too? > + */ > +static const struct i915_range mtl_oa_mux_regs[] = { > + { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */ > + { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */ > + { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */ > + { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */ > +}; > + > static bool gen7_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) > { > return reg_in_range_table(addr, gen7_oa_b_counters); > @@ -4349,7 +4372,10 @@ static bool xehp_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) > > static bool gen12_is_valid_mux_addr(struct i915_perf *perf, u32 addr) > { > - return reg_in_range_table(addr, gen12_oa_mux_regs); > + if (IS_METEORLAKE(perf->i915)) > + return reg_in_range_table(addr, mtl_oa_mux_regs); > + else > + return reg_in_range_table(addr, gen12_oa_mux_regs); But otherwise this is: Reviewed-by: Ashutosh Dixit If you decide to split the patches, please add my R-b on all the split patches.