From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH 04/12] drm/i915/execlists: Shortcircuit queue_prio() for no internal levels
Date: Tue, 26 May 2020 14:17:15 +0300 [thread overview]
Message-ID: <874ks3t078.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20200525075347.582-4-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> If there are no internal levels and the user priority-shift is zero, we
> can help the compiler eliminate some dead code:
>
> Function old new delta
> start_timeslice 169 154 -15
> __execlists_submission_tasklet 4696 4659 -37
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index de5be57ed6d2..3214a4ecc31a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -446,6 +446,9 @@ static int queue_prio(const struct intel_engine_execlists *execlists)
> * we have to flip the index value to become priority.
> */
> p = to_priolist(rb);
> + if (!I915_USER_PRIORITY_SHIFT)
> + return p->priority;
> +
> return ((p->priority + 1) << I915_USER_PRIORITY_SHIFT) - ffs(p->used);
> }
>
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2020-05-26 11:19 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-25 7:53 [Intel-gfx] [PATCH 01/12] drm/i915/gt: Stop cross-polluting PIN_GLOBAL with PIN_USER with no-ppgtt Chris Wilson
2020-05-25 7:53 ` [Intel-gfx] [PATCH 02/12] drm/i915/gt: Cancel the flush worker more thoroughly Chris Wilson
2020-05-25 13:51 ` Mika Kuoppala
2020-05-25 14:08 ` Chris Wilson
2020-05-25 7:53 ` [Intel-gfx] [PATCH 03/12] drm/i915/gem: Suppress some random warnings Chris Wilson
2020-05-25 13:55 ` Mika Kuoppala
2020-05-25 7:53 ` [Intel-gfx] [PATCH 04/12] drm/i915/execlists: Shortcircuit queue_prio() for no internal levels Chris Wilson
2020-05-26 11:17 ` Mika Kuoppala [this message]
2020-05-25 7:53 ` [Intel-gfx] [PATCH 05/12] drm/i915: Improve execute_cb struct packing Chris Wilson
2020-05-26 11:17 ` Mika Kuoppala
2020-05-25 7:53 ` [Intel-gfx] [PATCH 06/12] dma-buf: Proxy fence, an unsignaled fence placeholder Chris Wilson
2020-05-30 5:53 ` kbuild test robot
2020-05-30 5:53 ` kbuild test robot
2020-05-25 7:53 ` [Intel-gfx] [PATCH 07/12] drm/i915: Unpeel awaits on a proxy fence Chris Wilson
2020-05-25 7:53 ` [Intel-gfx] [PATCH 08/12] drm/i915: Add list_for_each_entry_safe_continue_reverse Chris Wilson
2020-05-25 7:53 ` [Intel-gfx] [PATCH 09/12] drm/i915/gem: Async GPU relocations only Chris Wilson
2020-05-25 7:53 ` [Intel-gfx] [PATCH 10/12] drm/i915/gem: Lift GPU relocation allocation Chris Wilson
2020-05-25 7:53 ` [Intel-gfx] [PATCH 11/12] drm/i915/gem: Add all GPU reloc awaits/signals en masse Chris Wilson
2020-05-25 7:53 ` [Intel-gfx] [PATCH 12/12] drm/i915/gem: Make relocations atomic within execbuf Chris Wilson
2020-05-25 8:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm/i915/gt: Stop cross-polluting PIN_GLOBAL with PIN_USER with no-ppgtt Patchwork
2020-05-25 8:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-05-25 8:24 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-05-25 15:38 ` [Intel-gfx] [PATCH 01/12] " Mika Kuoppala
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