From mboxrd@z Thu Jan 1 00:00:00 1970 From: Adrian Ratiu Subject: Re: [PATCH v5 4/5] drm: imx: Add i.MX 6 MIPI DSI host platform driver Date: Tue, 31 Mar 2020 10:19:00 +0300 Message-ID: <874ku52dqz.fsf@collabora.com> References: <20200330113542.181752-1-adrian.ratiu@collabora.com> <20200330113542.181752-5-adrian.ratiu@collabora.com> <4a9d2d6e5cecbe296c14119d27a8793a7dbed7b2.camel@collabora.com> <877dz134xf.fsf@collabora.com> <246bf7c71620021258355c2fc32dd38ac6b0cc45.camel@collabora.com> Mime-Version: 1.0 Content-Type: text/plain; format=flowed Return-path: In-Reply-To: <246bf7c71620021258355c2fc32dd38ac6b0cc45.camel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Ezequiel Garcia Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Jernej Skrabec , Sjoerd Simons , Andrzej Hajda , Martyn Welch , Jonas Karlman , linux-kernel , DRI mailing list , Emil Velikov , linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, NXP Linux Team , kernel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org, linux-stm32-XDFAJ8BFU24N7RejjzZ/Li2xQDfSxrLKVpNB7YpNyf8@public.gmane.org, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Laurent Pinchart , Fabio Estevam List-Id: linux-rockchip.vger.kernel.org On Tue, 31 Mar 2020, Ezequiel Garcia wrote: > On Tue, 2020-03-31 at 00:31 +0300, Adrian Ratiu wrote: >> On Mon, 30 Mar 2020, Ezequiel Garcia >> wrote: >> > Hello Fabio, Adrian: On Mon, 2020-03-30 at 08:49 -0300, >> > Fabio Estevam wrote: >> > > Hi Adrian, On Mon, Mar 30, 2020 at 8:34 AM Adrian Ratiu >> > > wrote: >> > > > This adds support for the Synopsis DesignWare MIPI DSI >> > > > v1.01 host controller which is embedded in i.MX 6 SoCs. >> > > > Based on following patches, but updated/extended to work >> > > > with existing support found in the kernel: - drm: imx: >> > > > Support Synopsys DesignWare MIPI DSI host controller >> > > > Signed-off-by: Liu Ying >> > > > - ARM: dtsi: imx6qdl: Add support for MIPI DSI host >> > > > controller >> > > > Signed-off-by: Liu Ying >> > > This one looks like a devicetree patch, but this patch >> > > does >> > > not touch devicetree. >> > > > + ret = clk_prepare_enable(dsi->pllref_clk); + >> > > > if (ret) { + dev_err(dev, "%s: Failed to >> > > > enable pllref_clk\n", __func__); + return >> > > > ret; + } + + dsi->mux_sel = >> > > > syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,gpr"); >> > > > + if (IS_ERR(dsi->mux_sel)) { + ret = >> > > > PTR_ERR(dsi->mux_sel); + dev_err(dev, "%s: >> > > > Failed to get GPR regmap: %d\n", + __func__, ret); + >> > > > return ret; >> > > You should disable the dsi->pllref_clk clock prior to >> > > returning the error. >> > Another approach could be moving the clock on and off to to >> > component_ops.{bind,unbind} (as rockhip driver does). What >> > exactly is the PLL clock needed for? Would it make sense to >> > move it some of the PHY power on/off? (Maybe not, but it's >> > worthing checking). Also, it seems the other IP blocks >> > have this PLL clock, so maybe it could be moved to the >> > dw_mipi_dsi core? This could be something for a follow-up, >> > to avoid creeping this series. >> Hi Ezequiel, pll is the video reference clock which drives >> the data lanes and yes all drivers have it as it's a basic >> requirement, so moving it to the common bridge is indeed a >> good idea, however this kind of driver refactoring is out of >> scope for this specific patch series, because, for now, I'd >> like to get the regmap and the imx6 driver in, once that is >> done we can think how to further abstract away common logic >> and slim down the existing drivers further. Basically I just >> want to avoid feature creep as I expect v6 to be ~ 8 patches >> big and the series is already over 1200 lines. > > Oh, absolutely: if there's one thing I try to avoid is feature > creep -- together with bikeshedding! > > Do note however, that you could move the PLL clock handling to > component_ops.{bind,unbind} and maybe simplify the error > handling. > > (BTW, great work!) Thanks! I'll do the bind/unbind move for the new imx6 driver which I'm adding in this series to make it resemble the existing rockchip driver a bit more, then I'll stop short of further driver refactorings. > > Cheers, > Ezequiel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57DDEC43331 for ; Tue, 31 Mar 2020 07:18:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A9902072A for ; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jJB9q-0000WF-HI; Tue, 31 Mar 2020 07:17:58 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jJB9n-0000VF-Ue; Tue, 31 Mar 2020 07:17:57 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: aratiu) with ESMTPSA id 867CC296952 From: Adrian Ratiu To: Ezequiel Garcia Subject: Re: [PATCH v5 4/5] drm: imx: Add i.MX 6 MIPI DSI host platform driver In-Reply-To: <246bf7c71620021258355c2fc32dd38ac6b0cc45.camel@collabora.com> References: <20200330113542.181752-1-adrian.ratiu@collabora.com> <20200330113542.181752-5-adrian.ratiu@collabora.com> <4a9d2d6e5cecbe296c14119d27a8793a7dbed7b2.camel@collabora.com> <877dz134xf.fsf@collabora.com> <246bf7c71620021258355c2fc32dd38ac6b0cc45.camel@collabora.com> Date: Tue, 31 Mar 2020 10:19:00 +0300 Message-ID: <874ku52dqz.fsf@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200331_001756_118303_4D8ADCBE X-CRM114-Status: GOOD ( 22.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Jernej Skrabec , Laurent Pinchart , Jonas Karlman , Martyn Welch , Sjoerd Simons , linux-kernel , DRI mailing list , Andrzej Hajda , NXP Linux Team , linux-rockchip@lists.infradead.org, kernel@collabora.com, Fabio Estevam , linux-stm32@st-md-mailman.stormreply.com, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Emil Velikov Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 31 Mar 2020, Ezequiel Garcia wrote: > On Tue, 2020-03-31 at 00:31 +0300, Adrian Ratiu wrote: >> On Mon, 30 Mar 2020, Ezequiel Garcia >> wrote: >> > Hello Fabio, Adrian: On Mon, 2020-03-30 at 08:49 -0300, >> > Fabio Estevam wrote: >> > > Hi Adrian, On Mon, Mar 30, 2020 at 8:34 AM Adrian Ratiu >> > > wrote: >> > > > This adds support for the Synopsis DesignWare MIPI DSI >> > > > v1.01 host controller which is embedded in i.MX 6 SoCs. >> > > > Based on following patches, but updated/extended to work >> > > > with existing support found in the kernel: - drm: imx: >> > > > Support Synopsys DesignWare MIPI DSI host controller >> > > > Signed-off-by: Liu Ying >> > > > - ARM: dtsi: imx6qdl: Add support for MIPI DSI host >> > > > controller >> > > > Signed-off-by: Liu Ying >> > > This one looks like a devicetree patch, but this patch >> > > does >> > > not touch devicetree. >> > > > + ret = clk_prepare_enable(dsi->pllref_clk); + >> > > > if (ret) { + dev_err(dev, "%s: Failed to >> > > > enable pllref_clk\n", __func__); + return >> > > > ret; + } + + dsi->mux_sel = >> > > > syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,gpr"); >> > > > + if (IS_ERR(dsi->mux_sel)) { + ret = >> > > > PTR_ERR(dsi->mux_sel); + dev_err(dev, "%s: >> > > > Failed to get GPR regmap: %d\n", + __func__, ret); + >> > > > return ret; >> > > You should disable the dsi->pllref_clk clock prior to >> > > returning the error. >> > Another approach could be moving the clock on and off to to >> > component_ops.{bind,unbind} (as rockhip driver does). What >> > exactly is the PLL clock needed for? Would it make sense to >> > move it some of the PHY power on/off? (Maybe not, but it's >> > worthing checking). Also, it seems the other IP blocks >> > have this PLL clock, so maybe it could be moved to the >> > dw_mipi_dsi core? This could be something for a follow-up, >> > to avoid creeping this series. >> Hi Ezequiel, pll is the video reference clock which drives >> the data lanes and yes all drivers have it as it's a basic >> requirement, so moving it to the common bridge is indeed a >> good idea, however this kind of driver refactoring is out of >> scope for this specific patch series, because, for now, I'd >> like to get the regmap and the imx6 driver in, once that is >> done we can think how to further abstract away common logic >> and slim down the existing drivers further. Basically I just >> want to avoid feature creep as I expect v6 to be ~ 8 patches >> big and the series is already over 1200 lines. > > Oh, absolutely: if there's one thing I try to avoid is feature > creep -- together with bikeshedding! > > Do note however, that you could move the PLL clock handling to > component_ops.{bind,unbind} and maybe simplify the error > handling. > > (BTW, great work!) Thanks! I'll do the bind/unbind move for the new imx6 driver which I'm adding in this series to make it resemble the existing rockchip driver a bit more, then I'll stop short of further driver refactorings. > > Cheers, > Ezequiel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 092F8C43331 for ; Tue, 31 Mar 2020 07:17:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D79C22072A for ; Tue, 31 Mar 2020 07:17:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726488AbgCaHR4 (ORCPT ); Tue, 31 Mar 2020 03:17:56 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:41086 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726174AbgCaHR4 (ORCPT ); Tue, 31 Mar 2020 03:17:56 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: aratiu) with ESMTPSA id 867CC296952 From: Adrian Ratiu To: Ezequiel Garcia Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Jernej Skrabec , Sjoerd Simons , Andrzej Hajda , Martyn Welch , Jonas Karlman , linux-kernel , DRI mailing list , Emil Velikov , linux-rockchip@lists.infradead.org, NXP Linux Team , kernel@collabora.com, linux-stm32@st-md-mailman.stormreply.com, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Laurent Pinchart , Fabio Estevam Subject: Re: [PATCH v5 4/5] drm: imx: Add i.MX 6 MIPI DSI host platform driver In-Reply-To: <246bf7c71620021258355c2fc32dd38ac6b0cc45.camel@collabora.com> References: <20200330113542.181752-1-adrian.ratiu@collabora.com> <20200330113542.181752-5-adrian.ratiu@collabora.com> <4a9d2d6e5cecbe296c14119d27a8793a7dbed7b2.camel@collabora.com> <877dz134xf.fsf@collabora.com> <246bf7c71620021258355c2fc32dd38ac6b0cc45.camel@collabora.com> Date: Tue, 31 Mar 2020 10:19:00 +0300 Message-ID: <874ku52dqz.fsf@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; format=flowed Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, 31 Mar 2020, Ezequiel Garcia wrote: > On Tue, 2020-03-31 at 00:31 +0300, Adrian Ratiu wrote: >> On Mon, 30 Mar 2020, Ezequiel Garcia >> wrote: >> > Hello Fabio, Adrian: On Mon, 2020-03-30 at 08:49 -0300, >> > Fabio Estevam wrote: >> > > Hi Adrian, On Mon, Mar 30, 2020 at 8:34 AM Adrian Ratiu >> > > wrote: >> > > > This adds support for the Synopsis DesignWare MIPI DSI >> > > > v1.01 host controller which is embedded in i.MX 6 SoCs. >> > > > Based on following patches, but updated/extended to work >> > > > with existing support found in the kernel: - drm: imx: >> > > > Support Synopsys DesignWare MIPI DSI host controller >> > > > Signed-off-by: Liu Ying >> > > > - ARM: dtsi: imx6qdl: Add support for MIPI DSI host >> > > > controller >> > > > Signed-off-by: Liu Ying >> > > This one looks like a devicetree patch, but this patch >> > > does >> > > not touch devicetree. >> > > > + ret = clk_prepare_enable(dsi->pllref_clk); + >> > > > if (ret) { + dev_err(dev, "%s: Failed to >> > > > enable pllref_clk\n", __func__); + return >> > > > ret; + } + + dsi->mux_sel = >> > > > syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,gpr"); >> > > > + if (IS_ERR(dsi->mux_sel)) { + ret = >> > > > PTR_ERR(dsi->mux_sel); + dev_err(dev, "%s: >> > > > Failed to get GPR regmap: %d\n", + __func__, ret); + >> > > > return ret; >> > > You should disable the dsi->pllref_clk clock prior to >> > > returning the error. >> > Another approach could be moving the clock on and off to to >> > component_ops.{bind,unbind} (as rockhip driver does). What >> > exactly is the PLL clock needed for? Would it make sense to >> > move it some of the PHY power on/off? (Maybe not, but it's >> > worthing checking). Also, it seems the other IP blocks >> > have this PLL clock, so maybe it could be moved to the >> > dw_mipi_dsi core? This could be something for a follow-up, >> > to avoid creeping this series. >> Hi Ezequiel, pll is the video reference clock which drives >> the data lanes and yes all drivers have it as it's a basic >> requirement, so moving it to the common bridge is indeed a >> good idea, however this kind of driver refactoring is out of >> scope for this specific patch series, because, for now, I'd >> like to get the regmap and the imx6 driver in, once that is >> done we can think how to further abstract away common logic >> and slim down the existing drivers further. Basically I just >> want to avoid feature creep as I expect v6 to be ~ 8 patches >> big and the series is already over 1200 lines. > > Oh, absolutely: if there's one thing I try to avoid is feature > creep -- together with bikeshedding! > > Do note however, that you could move the PLL clock handling to > component_ops.{bind,unbind} and maybe simplify the error > handling. > > (BTW, great work!) Thanks! I'll do the bind/unbind move for the new imx6 driver which I'm adding in this series to make it resemble the existing rockchip driver a bit more, then I'll stop short of further driver refactorings. > > Cheers, > Ezequiel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38F86C2D0E8 for ; Tue, 31 Mar 2020 07:17:58 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0415F2072A for ; Tue, 31 Mar 2020 07:17:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0415F2072A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5BAD96E27C; Tue, 31 Mar 2020 07:17:57 +0000 (UTC) Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by gabe.freedesktop.org (Postfix) with ESMTPS id 96E186E27C for ; Tue, 31 Mar 2020 07:17:55 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: aratiu) with ESMTPSA id 867CC296952 From: Adrian Ratiu To: Ezequiel Garcia Subject: Re: [PATCH v5 4/5] drm: imx: Add i.MX 6 MIPI DSI host platform driver In-Reply-To: <246bf7c71620021258355c2fc32dd38ac6b0cc45.camel@collabora.com> References: <20200330113542.181752-1-adrian.ratiu@collabora.com> <20200330113542.181752-5-adrian.ratiu@collabora.com> <4a9d2d6e5cecbe296c14119d27a8793a7dbed7b2.camel@collabora.com> <877dz134xf.fsf@collabora.com> <246bf7c71620021258355c2fc32dd38ac6b0cc45.camel@collabora.com> Date: Tue, 31 Mar 2020 10:19:00 +0300 Message-ID: <874ku52dqz.fsf@collabora.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Jernej Skrabec , Laurent Pinchart , Jonas Karlman , Martyn Welch , Sjoerd Simons , linux-kernel , DRI mailing list , Andrzej Hajda , NXP Linux Team , linux-rockchip@lists.infradead.org, kernel@collabora.com, linux-stm32@st-md-mailman.stormreply.com, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Emil Velikov Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Tue, 31 Mar 2020, Ezequiel Garcia wrote: > On Tue, 2020-03-31 at 00:31 +0300, Adrian Ratiu wrote: >> On Mon, 30 Mar 2020, Ezequiel Garcia >> wrote: >> > Hello Fabio, Adrian: On Mon, 2020-03-30 at 08:49 -0300, >> > Fabio Estevam wrote: >> > > Hi Adrian, On Mon, Mar 30, 2020 at 8:34 AM Adrian Ratiu >> > > wrote: >> > > > This adds support for the Synopsis DesignWare MIPI DSI >> > > > v1.01 host controller which is embedded in i.MX 6 SoCs. >> > > > Based on following patches, but updated/extended to work >> > > > with existing support found in the kernel: - drm: imx: >> > > > Support Synopsys DesignWare MIPI DSI host controller >> > > > Signed-off-by: Liu Ying >> > > > - ARM: dtsi: imx6qdl: Add support for MIPI DSI host >> > > > controller >> > > > Signed-off-by: Liu Ying >> > > This one looks like a devicetree patch, but this patch >> > > does >> > > not touch devicetree. >> > > > + ret = clk_prepare_enable(dsi->pllref_clk); + >> > > > if (ret) { + dev_err(dev, "%s: Failed to >> > > > enable pllref_clk\n", __func__); + return >> > > > ret; + } + + dsi->mux_sel = >> > > > syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,gpr"); >> > > > + if (IS_ERR(dsi->mux_sel)) { + ret = >> > > > PTR_ERR(dsi->mux_sel); + dev_err(dev, "%s: >> > > > Failed to get GPR regmap: %d\n", + __func__, ret); + >> > > > return ret; >> > > You should disable the dsi->pllref_clk clock prior to >> > > returning the error. >> > Another approach could be moving the clock on and off to to >> > component_ops.{bind,unbind} (as rockhip driver does). What >> > exactly is the PLL clock needed for? Would it make sense to >> > move it some of the PHY power on/off? (Maybe not, but it's >> > worthing checking). Also, it seems the other IP blocks >> > have this PLL clock, so maybe it could be moved to the >> > dw_mipi_dsi core? This could be something for a follow-up, >> > to avoid creeping this series. >> Hi Ezequiel, pll is the video reference clock which drives >> the data lanes and yes all drivers have it as it's a basic >> requirement, so moving it to the common bridge is indeed a >> good idea, however this kind of driver refactoring is out of >> scope for this specific patch series, because, for now, I'd >> like to get the regmap and the imx6 driver in, once that is >> done we can think how to further abstract away common logic >> and slim down the existing drivers further. Basically I just >> want to avoid feature creep as I expect v6 to be ~ 8 patches >> big and the series is already over 1200 lines. > > Oh, absolutely: if there's one thing I try to avoid is feature > creep -- together with bikeshedding! > > Do note however, that you could move the PLL clock handling to > component_ops.{bind,unbind} and maybe simplify the error > handling. > > (BTW, great work!) Thanks! I'll do the bind/unbind move for the new imx6 driver which I'm adding in this series to make it resemble the existing rockchip driver a bit more, then I'll stop short of further driver refactorings. > > Cheers, > Ezequiel _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel