Re: [PATCH] drm/i915/audio: Add 801Mhz clock entries to dp_aud_n_m table

[Jani Nikula <jani.nikula@intel.com>]

On Thu, 07 Jun 2018, Radhakrishna Sripada <radhakrishna.sripada@intel.com> wrote:
> From: "Sripada, Radhakrishna" <radhakrishna.sripada@intel.com>
>
> Expand the Maud/Naud table according to DP 1.4 spec to include entries for
> 810 MHz clock. This is required for audio to work with HBR3.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/intel_audio.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
> index 3ea566f99450..6d1c33066987 100644
> --- a/drivers/gpu/drm/i915/intel_audio.c
> +++ b/drivers/gpu/drm/i915/intel_audio.c
> @@ -59,6 +59,7 @@
>   */
>  
>  /* DP N/M table */
> +#define LC_810M	810000
>  #define LC_540M	540000
>  #define LC_270M	270000
>  #define LC_162M	162000
> @@ -99,6 +100,15 @@ static const struct dp_aud_n_m dp_aud_n_m[] = {
>  	{ 128000, LC_540M, 4096, 33750 },
>  	{ 176400, LC_540M, 3136, 18750 },
>  	{ 192000, LC_540M, 2048, 11250 },
> +	{ 32000, LC_810M, 1024, 50625 },
> +	{ 44100, LC_810M, 784, 28125 },
> +	{ 48000, LC_810M, 512, 16875 },
> +	{ 64000, LC_810M, 2048, 50625 },
> +	{ 88200, LC_810M, 1568, 28125 },
> +	{ 96000, LC_810M, 1024, 16875 },
> +	{ 128000, LC_810M, 4096, 50625 },
> +	{ 176400, LC_810M, 3136, 28125 },
> +	{ 192000, LC_810M, 2048, 16875 },
>  };
>  
>  static const struct dp_aud_n_m *

-- 
Jani Nikula, Intel Open Source Graphics Center
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