From mboxrd@z Thu Jan 1 00:00:00 1970 From: arno@natisbad.org (Arnaud Ebalard) Date: Sun, 16 Nov 2014 23:29:00 +0100 Subject: [PATCHv2 5/8] arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370 In-Reply-To: <20141116211034.GJ15870@lunn.ch> (Andrew Lunn's message of "Sun, 16 Nov 2014 22:10:34 +0100") References: <20141116211034.GJ15870@lunn.ch> Message-ID: <874mtyok43.fsf@natisbad.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, Andrew Lunn writes: > On Sun, Nov 16, 2014 at 06:37:33PM +0100, Arnaud Ebalard wrote: >> >> pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are >> common configurations. Instead of replicating them in each .dts file, >> put those in armada-370.dtsi file so that they can be referenced. >> >> Suggested-by: Andrew Lunn >> Signed-off-by: Arnaud Ebalard >> --- >> arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi >> index 6b3c23b1e138..d9f5d59e463e 100644 >> --- a/arch/arm/boot/dts/armada-370.dtsi >> +++ b/arch/arm/boot/dts/armada-370.dtsi >> @@ -115,6 +115,17 @@ >> compatible = "marvell,mv88f6710-pinctrl"; >> reg = <0x18000 0x38>; >> >> + uart0_pins: uart0-pins { >> + marvell,pins = "mpp0", "mpp1"; >> + marvell,function = "uart0"; >> + }; > > Thanks for these. > > We can go one stage further. kirkwood.dts has: > > uart0: serial at 12000 { > compatible = "ns16550a"; > reg = <0x12000 0x100>; > reg-shift = <2>; > interrupts = <33>; > clocks = <&gate_clk 7>; > pinctrl-0 = <&pmx_uart0>; > pinctrl-names = "default"; > status = "disabled"; > }; > > i.e actually references them. This is safe because a board .dts file > can override the pins if needed. > > We should do the same here, both for 370 and XP. Just to be sure I understand: for uart0 and uart1, I think this can only be done for Armada 370 (on XP, uart0/1 rx/tx are not mpp). This only a matter of adding the following in armada-370.dtsi for uart0: /* * Default UART pinctrl setting without RTS/CTS, can * be overwritten on board level. */ uart0: serial at 12000 { pinctrl-0 = <&uart0_pins>; pinctrl-names = "default"; }; For uart1, it's not obvious because there are 6 different MPP which can be configured to act as uart1 TXD. Same for RXD. If I remove the ones overlapping w/ RGMII pins for GbE interfaces, which one should be selected as default: 41/42, 55/57, 60/61? Now, regarding armada XP, uart2 and uart3 txd/rxd MPP are 42/43 and 44/45. Best we can do is put the same as above in each specific armada-xp-mv78XXX.dtsi file, where pinctrl node is, after adding uart2-pins and uart3-pins. Unless I am missing something, this cannot be done in armada-xp.dtsi. Cheers, a+ From mboxrd@z Thu Jan 1 00:00:00 1970 From: arno-LkuqDEemtHBg9hUCZPvPmw@public.gmane.org (Arnaud Ebalard) Subject: Re: [PATCHv2 5/8] arm: mvebu: add common uart0 and spi0 pintcrl entries for Armada 370 Date: Sun, 16 Nov 2014 23:29:00 +0100 Message-ID: <874mtyok43.fsf@natisbad.org> References: <20141116211034.GJ15870@lunn.ch> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20141116211034.GJ15870-g2DYL2Zd6BY@public.gmane.org> (Andrew Lunn's message of "Sun, 16 Nov 2014 22:10:34 +0100") Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Andrew Lunn Cc: Mark Rutland , Ian Campbell , Ben Peddell , Jason Cooper , Pawel Moll , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Stephen Warren , Rob Herring , Gregory Clement , Russell King , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Sebastian Hesselbarth List-Id: devicetree@vger.kernel.org Hi, Andrew Lunn writes: > On Sun, Nov 16, 2014 at 06:37:33PM +0100, Arnaud Ebalard wrote: >> >> pinctrl entries for uart0 using MPP0-1 and spi0 using MPP33-36 are >> common configurations. Instead of replicating them in each .dts file, >> put those in armada-370.dtsi file so that they can be referenced. >> >> Suggested-by: Andrew Lunn >> Signed-off-by: Arnaud Ebalard >> --- >> arch/arm/boot/dts/armada-370.dtsi | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi >> index 6b3c23b1e138..d9f5d59e463e 100644 >> --- a/arch/arm/boot/dts/armada-370.dtsi >> +++ b/arch/arm/boot/dts/armada-370.dtsi >> @@ -115,6 +115,17 @@ >> compatible = "marvell,mv88f6710-pinctrl"; >> reg = <0x18000 0x38>; >> >> + uart0_pins: uart0-pins { >> + marvell,pins = "mpp0", "mpp1"; >> + marvell,function = "uart0"; >> + }; > > Thanks for these. > > We can go one stage further. kirkwood.dts has: > > uart0: serial@12000 { > compatible = "ns16550a"; > reg = <0x12000 0x100>; > reg-shift = <2>; > interrupts = <33>; > clocks = <&gate_clk 7>; > pinctrl-0 = <&pmx_uart0>; > pinctrl-names = "default"; > status = "disabled"; > }; > > i.e actually references them. This is safe because a board .dts file > can override the pins if needed. > > We should do the same here, both for 370 and XP. Just to be sure I understand: for uart0 and uart1, I think this can only be done for Armada 370 (on XP, uart0/1 rx/tx are not mpp). This only a matter of adding the following in armada-370.dtsi for uart0: /* * Default UART pinctrl setting without RTS/CTS, can * be overwritten on board level. */ uart0: serial@12000 { pinctrl-0 = <&uart0_pins>; pinctrl-names = "default"; }; For uart1, it's not obvious because there are 6 different MPP which can be configured to act as uart1 TXD. Same for RXD. If I remove the ones overlapping w/ RGMII pins for GbE interfaces, which one should be selected as default: 41/42, 55/57, 60/61? Now, regarding armada XP, uart2 and uart3 txd/rxd MPP are 42/43 and 44/45. Best we can do is put the same as above in each specific armada-xp-mv78XXX.dtsi file, where pinctrl node is, after adding uart2-pins and uart3-pins. Unless I am missing something, this cannot be done in armada-xp.dtsi. Cheers, a+ -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html