All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>, intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 02/10] drm/i915: extract ilk_display_irq_handler
Date: Fri, 19 Jul 2013 15:14:37 +0300	[thread overview]
Message-ID: <874nbqagr6.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <1373657718-3008-3-git-send-email-przanoni@gmail.com>

Paulo Zanoni <przanoni@gmail.com> writes:

> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> It's the code that deals with de_iir.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Minor observation on the whole irq stuff: ilk, ironlake and ivb,
ivybridge are both used and I couldn't figure out the pattern.

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 104 +++++++++++++++++++++-------------------
>  1 file changed, 56 insertions(+), 48 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index f397f9a..39160a2 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1202,6 +1202,60 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
>  		cpt_serr_int_handler(dev);
>  }
>  
> +static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +
> +	if (de_iir & DE_AUX_CHANNEL_A)
> +		dp_aux_irq_handler(dev);
> +
> +	if (de_iir & DE_GSE)
> +		intel_opregion_asle_intr(dev);
> +
> +	if (de_iir & DE_PIPEA_VBLANK)
> +		drm_handle_vblank(dev, 0);
> +
> +	if (de_iir & DE_PIPEB_VBLANK)
> +		drm_handle_vblank(dev, 1);
> +
> +	if (de_iir & DE_POISON)
> +		DRM_ERROR("Poison interrupt\n");
> +
> +	if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
> +		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
> +			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
> +
> +	if (de_iir & DE_PIPEB_FIFO_UNDERRUN)
> +		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
> +			DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
> +
> +	if (de_iir & DE_PLANEA_FLIP_DONE) {
> +		intel_prepare_page_flip(dev, 0);
> +		intel_finish_page_flip_plane(dev, 0);
> +	}
> +
> +	if (de_iir & DE_PLANEB_FLIP_DONE) {
> +		intel_prepare_page_flip(dev, 1);
> +		intel_finish_page_flip_plane(dev, 1);
> +	}
> +
> +	/* check event from PCH */
> +	if (de_iir & DE_PCH_EVENT) {
> +		u32 pch_iir = I915_READ(SDEIIR);
> +
> +		if (HAS_PCH_CPT(dev))
> +			cpt_irq_handler(dev, pch_iir);
> +		else
> +			ibx_irq_handler(dev, pch_iir);
> +
> +		/* should clear PCH hotplug event before clear CPU irq */
> +		I915_WRITE(SDEIIR, pch_iir);
> +	}
> +
> +	if (IS_GEN5(dev) && de_iir & DE_PCU_EVENT)
> +		ironlake_rps_change_irq_handler(dev);
> +}
> +
>  static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
>  {
>  	struct drm_device *dev = (struct drm_device *) arg;
> @@ -1360,54 +1414,8 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>  	else
>  		snb_gt_irq_handler(dev, dev_priv, gt_iir);
>  
> -	if (de_iir & DE_AUX_CHANNEL_A)
> -		dp_aux_irq_handler(dev);
> -
> -	if (de_iir & DE_GSE)
> -		intel_opregion_asle_intr(dev);
> -
> -	if (de_iir & DE_PIPEA_VBLANK)
> -		drm_handle_vblank(dev, 0);
> -
> -	if (de_iir & DE_PIPEB_VBLANK)
> -		drm_handle_vblank(dev, 1);
> -
> -	if (de_iir & DE_POISON)
> -		DRM_ERROR("Poison interrupt\n");
> -
> -	if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
> -		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
> -			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
> -
> -	if (de_iir & DE_PIPEB_FIFO_UNDERRUN)
> -		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
> -			DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
> -
> -	if (de_iir & DE_PLANEA_FLIP_DONE) {
> -		intel_prepare_page_flip(dev, 0);
> -		intel_finish_page_flip_plane(dev, 0);
> -	}
> -
> -	if (de_iir & DE_PLANEB_FLIP_DONE) {
> -		intel_prepare_page_flip(dev, 1);
> -		intel_finish_page_flip_plane(dev, 1);
> -	}
> -
> -	/* check event from PCH */
> -	if (de_iir & DE_PCH_EVENT) {
> -		u32 pch_iir = I915_READ(SDEIIR);
> -
> -		if (HAS_PCH_CPT(dev))
> -			cpt_irq_handler(dev, pch_iir);
> -		else
> -			ibx_irq_handler(dev, pch_iir);
> -
> -		/* should clear PCH hotplug event before clear CPU irq */
> -		I915_WRITE(SDEIIR, pch_iir);
> -	}
> -
> -	if (IS_GEN5(dev) &&  de_iir & DE_PCU_EVENT)
> -		ironlake_rps_change_irq_handler(dev);
> +	if (de_iir)
> +		ilk_display_irq_handler(dev, de_iir);
>  
>  	if (IS_GEN6(dev) && pm_iir & GEN6_PM_RPS_EVENTS)
>  		gen6_rps_irq_handler(dev_priv, pm_iir);
> -- 
> 1.8.1.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2013-07-19 12:14 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-07-12 19:35 [PATCH 00/10] Unify ILK/SNB/IVB/HSW IRQ vfuncs Paulo Zanoni
2013-07-12 19:35 ` [PATCH 01/10] drm/i915: kill ivybridge_irq_preinstall Paulo Zanoni
2013-07-19 12:02   ` Mika Kuoppala
2013-07-12 19:35 ` [PATCH 02/10] drm/i915: extract ilk_display_irq_handler Paulo Zanoni
2013-07-19 12:14   ` Mika Kuoppala [this message]
2013-07-19 14:24     ` Paulo Zanoni
2013-07-19 16:04       ` Daniel Vetter
2013-07-12 19:35 ` [PATCH 03/10] drm/i915: extract ivb_display_irq_handler Paulo Zanoni
2013-07-19 12:15   ` Mika Kuoppala
2013-07-12 19:35 ` [PATCH 04/10] drm/i915: don't read or write GEN6_PMIIR on Gen 5 Paulo Zanoni
2013-07-12 19:46   ` Chris Wilson
2013-07-12 22:52     ` [PATCH 4/9] " Paulo Zanoni
2013-07-19 12:18       ` Mika Kuoppala
2013-07-12 19:35 ` [PATCH 05/10] drm/i915: reorganize ironlake_irq_handler Paulo Zanoni
2013-07-12 19:48   ` Chris Wilson
2013-07-12 22:54     ` [PATCH 5/9] " Paulo Zanoni
2013-07-19 12:35       ` Mika Kuoppala
2013-07-12 19:35 ` [PATCH 06/10] drm/i915: POSTING_READ(DEIER) on ivybridge_irq_handler Paulo Zanoni
2013-07-19 12:54   ` Mika Kuoppala
2013-07-12 19:35 ` [PATCH 07/10] drm/i915: add ILK/SNB support to ivybridge_irq_handler Paulo Zanoni
2013-07-12 22:56   ` [PATCH 7/9] " Paulo Zanoni
2013-07-19 13:09     ` Mika Kuoppala
2013-07-12 19:35 ` [PATCH 08/10] drm/i915: kill ivybridge_enable_vblank Paulo Zanoni
2013-07-12 19:50   ` Chris Wilson
2013-07-12 23:00     ` [PATCH 8/9] drm/i915: kill Ivybridge vblank irq vfuncs Paulo Zanoni
2013-07-19 13:30       ` Mika Kuoppala
2013-07-12 19:35 ` [PATCH 09/10] drm/i915: kill ivybridge_disable_vblank Paulo Zanoni
2013-07-12 19:35 ` [PATCH 10/10] drm/i915: kill ivybridge_irq_postinstall Paulo Zanoni
2013-07-12 19:52   ` Chris Wilson
2013-07-12 23:01     ` [PATCH 9/9] " Paulo Zanoni
2013-07-19 13:44       ` Mika Kuoppala
2013-07-19 16:11         ` Daniel Vetter

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=874nbqagr6.fsf@gaia.fi.intel.com \
    --to=mika.kuoppala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=paulo.r.zanoni@intel.com \
    --cc=przanoni@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.