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b=Q0U8tH0YwbONoWuQpLrrZV/cEeWvN6sYggaLHd1dAhhGhxHTxZnoxJ/tfq2nAG/J52B/QwjJtFKmyrgi9tHKjG06gDGDIJhNtvGpeLbi5DnzqDN/hlIq97G3WsQ4pWDSESVXtM72KQgWP6+RgUwdYzA5E08zood/WyqRDZJE7MR74u+5zQOygUKKijnALEErmCjD+LDlPjsmigq2gFS/D6SoY28i9PgZW8yfFfTBYlIiEFCxW4k2fLmkOu+RfUJ7AQeFJ67gcwt/95hQR0VGkbY2QkRDGTRavT9TKXG2oIOblGPH/H7BSHg4+8I/HeDtdl+Y8vE4mEbs5BR59+orRQ== From: Volodymyr Babchuk To: Mykola Kvach CC: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel Subject: Re: [PATCH v4 3/4] xen/arm: its: refactor ITS quirk matching Thread-Topic: [PATCH v4 3/4] xen/arm: its: refactor ITS quirk matching Thread-Index: AQHdUEUWBir3UQDjYEWvHkcwQ5Z1KA== Date: Tue, 13 Oct 2026 02:59:05 +0000 Message-ID: <875wz6wbk6.fsf@epam.com> References: In-Reply-To: (Mykola Kvach's message of "Tue, 29 Sep 2026 22:02:12 +0300") Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: mu4e 1.14.3; emacs 30.2 authentication-results: mx.microsoft.com 1; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VE1PR03MB6078.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 11f498ff-013c-4649-5145-08df28d5f1cd X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Oct 2026 02:59:05.9193 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: rZDOwEcPMkDRfVmJwkgjscn+c95rNwPsvebobGTLCcEYVv9huKuWkdokBSqyuL+T+Mh7dQUwX19BwOoz75JDu3CyKiawiKcPtpe5k8AU2Jw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR03MB11092 X-purgate-ID: tlsNG-720697/1791860351-674BE2AC-E95EB5A7/0/0 X-purgate-type: clean X-purgate-size: 6057 Hi, Mykola Kvach writes: > ITS quirks are matched only by IIDR and mask fields stored in each table > entry. That is too coarse when the same GIC IP block appears on several > platforms but a workaround is valid only for some of them. > > Replace the fixed IIDR fields with a generic match(hw_its, data) > callback and an opaque data pointer. Add an IIDR matcher as a reusable > building block and use it from the R-Car Gen4 matcher after checking the > Renesas machine compatibles. > > This intentionally narrows the R-Car Gen4 quirk. Previously every ITS > with IIDR 0x0201743b matched. Now it matches only a DT-discovered ITS on > an r8a779f0 or r8a779g0 machine. ACPI-discovered ITSes and the same IIDR > on other platforms no longer match. > > Keep first-match semantics explicit. Use BUG_ON() if a non-sentinel > entry has no matcher or the IIDR matcher receives no data. A broken > entry must stop Xen in both debug and release builds, as skipping a > required workaround could cause a failure later. Place the matcher data > and table in init-only read-only sections. > > The matched entry still supplies separate ITS and LPI flags; this patch > only changes how the entry is selected. > > Signed-off-by: Mykola Kvach Reviewed-by: Volodymyr Babchuk > --- > Changes in v4: > - Use BUG_ON() for missing IIDR match data or a missing match callback. > - Keep the existing quirks variable name in gicv3_its_find_quirk(). > > Changes in v3: > - Document the intentional narrowing of the R-Car Gen4 match. > - Add the non-debug NULL-data guard. > - Put the matcher data and table in init-only read-only sections. > > Changes in v2: > - Replace v1's optional platform callback plus fixed IIDR/mask fields > with a single generic match(hw_its, data) selector. > - Add a reusable IIDR matcher and use it after the R-Car Gen4 > machine-compatible checks. > - Document that the R-Car Gen4 quirk remains DT-only. > - Keep the split ITS and host LPI quirk scopes when applying the matched > entry. > - Document first-match ordering in the lookup path and guard against > entries without a match callback or IIDR match data. > --- > xen/arch/arm/gic-v3-its.c | 64 +++++++++++++++++++++++++++++++-------- > 1 file changed, 52 insertions(+), 12 deletions(-) > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index 280ace0577..43804a6c7a 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -54,8 +54,8 @@ struct its_device { > =20 > struct its_quirk { > const char *desc; > - uint32_t iidr; > - uint32_t mask; > + bool (*match)(const struct host_its *hw_its, const void *data); > + const void *data; > uint32_t its_flags; > /* > * lpi_flags are ORed into the global host LPI policy and must only > @@ -65,11 +65,49 @@ struct its_quirk { > uint32_t lpi_flags; > }; > =20 > -static const struct its_quirk its_quirks[] =3D { > +struct its_quirk_match_iidr { > + uint32_t iidr; > + uint32_t mask; > +}; > + > +static bool __init gicv3_its_match_iidr(const struct host_its *hw_its, > + const void *data) > +{ > + const struct its_quirk_match_iidr *match; > + uint32_t iidr; > + > + BUG_ON(!data); > + > + match =3D data; > + iidr =3D readl_relaxed(hw_its->its_base + GITS_IIDR); > + > + return (iidr & match->mask) =3D=3D match->iidr; > +} > + > +static bool __init gicv3_its_match_quirk_gen4(const struct host_its *hw_= its, > + const void *data) > +{ > + if ( !hw_its->dt_node ) > + return false; > + > + if ( !dt_machine_is_compatible("renesas,r8a779f0") && > + !dt_machine_is_compatible("renesas,r8a779g0") ) > + return false; > + > + return gicv3_its_match_iidr(hw_its, data); > +} > + > +static const struct its_quirk_match_iidr rcar_gen4_iidr __initconst =3D = { > + /* Implementer 0x43b identifies Arm Ltd. */ > + .iidr =3D 0x0201743b, > + .mask =3D 0xffffffffU, > +}; > + > +static const struct its_quirk its_quirks[] __initconstrel =3D { > { > - .desc =3D "R-Car Gen4", > - .iidr =3D 0x0201743b, > - .mask =3D 0xffffffffU, > + .desc =3D "R-Car Gen4", > + .match =3D gicv3_its_match_quirk_gen4, > + .data =3D &rcar_gen4_iidr, > .its_flags =3D GICV3_QUIRK_MEM_NC_NS | GICV3_QUIRK_MEM_32BIT_ADD= R, > .lpi_flags =3D GICV3_QUIRK_MEM_NC_NS | GICV3_QUIRK_MEM_32BIT_ADD= R, > }, > @@ -78,17 +116,20 @@ static const struct its_quirk its_quirks[] =3D { > } > }; > =20 > -static const struct its_quirk *__init gicv3_its_find_quirk(uint32_t iidr= ) > +static const struct its_quirk *__init gicv3_its_find_quirk( > + const struct host_its *hw_its) > { > const struct its_quirk *quirks =3D its_quirks; > =20 > /* > - * The first matching quirk wins. More specific quirks must be liste= d > - * before broader IIDR-only entries. > + * The first matching quirk wins. Entries that match a specific plat= form > + * must be listed before broader IIDR-only entries. > */ > for ( ; quirks->desc; quirks++ ) > { > - if ( quirks->iidr =3D=3D (quirks->mask & iidr) ) > + BUG_ON(!quirks->match); > + > + if ( quirks->match(hw_its, quirks->data) ) > return quirks; > } > =20 > @@ -97,8 +138,7 @@ static const struct its_quirk *__init gicv3_its_find_q= uirk(uint32_t iidr) > =20 > static void __init gicv3_its_collect_quirks(struct host_its *hw_its) > { > - uint32_t iidr =3D readl_relaxed(hw_its->its_base + GITS_IIDR); > - const struct its_quirk *quirk =3D gicv3_its_find_quirk(iidr); > + const struct its_quirk *quirk =3D gicv3_its_find_quirk(hw_its); > =20 > if ( quirk ) > { --=20 WBR, Volodymyr=