From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH v2 1/2] drm/i915/hdmi: Add HDMI 2.0 audio clock recovery N values Date: Fri, 26 Oct 2018 10:04:32 +0300 Message-ID: <875zxpchof.fsf@intel.com> References: <1538778405-29103-1-git-send-email-clinton.a.taylor@intel.com> <1540493521-1746-1-git-send-email-clinton.a.taylor@intel.com> <1540493521-1746-2-git-send-email-clinton.a.taylor@intel.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1540493521-1746-2-git-send-email-clinton.a.taylor@intel.com> Sender: stable-owner@vger.kernel.org To: Intel-gfx@lists.freedesktop.org Cc: Clint Taylor , stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 25 Oct 2018, clinton.a.taylor@intel.com wrote: > From: Clint Taylor > > HDMI 2.0 594Mhz modes were incorrectly selecting 25.200Mhz Automatic N value > mode instead of HDMI specification values. > > V2: Fix 88.2 Hz N value > > Cc: Jani Nikula > Cc: stable@vger.kernel.org > Signed-off-by: Clint Taylor Pushed to dinq, thanks for the patch. BR, Jani. > --- > drivers/gpu/drm/i915/intel_audio.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c > index 769f3f5..ee3ca2d 100644 > --- a/drivers/gpu/drm/i915/intel_audio.c > +++ b/drivers/gpu/drm/i915/intel_audio.c > @@ -144,6 +144,9 @@ struct dp_aud_n_m { > /* HDMI N/CTS table */ > #define TMDS_297M 297000 > #define TMDS_296M 296703 > +#define TMDS_594M 594000 > +#define TMDS_593M 593407 > + > static const struct { > int sample_rate; > int clock; > @@ -164,6 +167,20 @@ struct dp_aud_n_m { > { 176400, TMDS_297M, 18816, 247500 }, > { 192000, TMDS_296M, 23296, 281250 }, > { 192000, TMDS_297M, 20480, 247500 }, > + { 44100, TMDS_593M, 8918, 937500 }, > + { 44100, TMDS_594M, 9408, 990000 }, > + { 48000, TMDS_593M, 5824, 562500 }, > + { 48000, TMDS_594M, 6144, 594000 }, > + { 32000, TMDS_593M, 5824, 843750 }, > + { 32000, TMDS_594M, 3072, 445500 }, > + { 88200, TMDS_593M, 17836, 937500 }, > + { 88200, TMDS_594M, 18816, 990000 }, > + { 96000, TMDS_593M, 11648, 562500 }, > + { 96000, TMDS_594M, 12288, 594000 }, > + { 176400, TMDS_593M, 35672, 937500 }, > + { 176400, TMDS_594M, 37632, 990000 }, > + { 192000, TMDS_593M, 23296, 562500 }, > + { 192000, TMDS_594M, 24576, 594000 }, > }; > > /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */ -- Jani Nikula, Intel Open Source Graphics Center From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com ([134.134.136.100]:60625 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725876AbeJZPkq (ORCPT ); Fri, 26 Oct 2018 11:40:46 -0400 From: Jani Nikula To: clinton.a.taylor@intel.com, Intel-gfx@lists.freedesktop.org Cc: Clint Taylor , stable@vger.kernel.org Subject: Re: [PATCH v2 1/2] drm/i915/hdmi: Add HDMI 2.0 audio clock recovery N values In-Reply-To: <1540493521-1746-2-git-send-email-clinton.a.taylor@intel.com> References: <1538778405-29103-1-git-send-email-clinton.a.taylor@intel.com> <1540493521-1746-1-git-send-email-clinton.a.taylor@intel.com> <1540493521-1746-2-git-send-email-clinton.a.taylor@intel.com> Date: Fri, 26 Oct 2018 10:04:32 +0300 Message-ID: <875zxpchof.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: stable-owner@vger.kernel.org List-ID: On Thu, 25 Oct 2018, clinton.a.taylor@intel.com wrote: > From: Clint Taylor > > HDMI 2.0 594Mhz modes were incorrectly selecting 25.200Mhz Automatic N value > mode instead of HDMI specification values. > > V2: Fix 88.2 Hz N value > > Cc: Jani Nikula > Cc: stable@vger.kernel.org > Signed-off-by: Clint Taylor Pushed to dinq, thanks for the patch. BR, Jani. > --- > drivers/gpu/drm/i915/intel_audio.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c > index 769f3f5..ee3ca2d 100644 > --- a/drivers/gpu/drm/i915/intel_audio.c > +++ b/drivers/gpu/drm/i915/intel_audio.c > @@ -144,6 +144,9 @@ struct dp_aud_n_m { > /* HDMI N/CTS table */ > #define TMDS_297M 297000 > #define TMDS_296M 296703 > +#define TMDS_594M 594000 > +#define TMDS_593M 593407 > + > static const struct { > int sample_rate; > int clock; > @@ -164,6 +167,20 @@ struct dp_aud_n_m { > { 176400, TMDS_297M, 18816, 247500 }, > { 192000, TMDS_296M, 23296, 281250 }, > { 192000, TMDS_297M, 20480, 247500 }, > + { 44100, TMDS_593M, 8918, 937500 }, > + { 44100, TMDS_594M, 9408, 990000 }, > + { 48000, TMDS_593M, 5824, 562500 }, > + { 48000, TMDS_594M, 6144, 594000 }, > + { 32000, TMDS_593M, 5824, 843750 }, > + { 32000, TMDS_594M, 3072, 445500 }, > + { 88200, TMDS_593M, 17836, 937500 }, > + { 88200, TMDS_594M, 18816, 990000 }, > + { 96000, TMDS_593M, 11648, 562500 }, > + { 96000, TMDS_594M, 12288, 594000 }, > + { 176400, TMDS_593M, 35672, 937500 }, > + { 176400, TMDS_594M, 37632, 990000 }, > + { 192000, TMDS_593M, 23296, 562500 }, > + { 192000, TMDS_594M, 24576, 594000 }, > }; > > /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */ -- Jani Nikula, Intel Open Source Graphics Center