From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jani Nikula <jani.nikula@intel.com>
Subject: Re: [PATCH v4 07/20] drm/i915/icl: Define AUX lane
 registers for Port A/B
Date: Fri, 06 Jul 2018 12:16:08 +0300
Message-ID: <87601sohbb.fsf@intel.com>
References: <1530798591-2077-1-git-send-email-madhav.chauhan@intel.com>
 <1530798591-2077-8-git-send-email-madhav.chauhan@intel.com>
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