Re: [PATCH] drm/i915: Always pin contexts into the high GGTT

From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Always pin contexts into the high GGTT
Date: Fri, 10 Feb 2017 12:29:55 +0200	[thread overview]
Message-ID: <8760kiqqxo.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20170210101422.1598-1-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Now that we have fast top-down insertion into the drm_mm, we can use it
> for frequent runtime operations like insertion of the context object,
> whereas before we limited it to the one-off insertion of the pinned
> kernel context. Keeping the active context objects out of the mappable
> region of the global GTT (except under memory pressure) improves our
> ability to allocate mappable aperture region without triggering a GPU
> stall.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>

> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c        |  4 +---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 12 +++---------
>  2 files changed, 4 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index b21dbd44045e..697776d427b9 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -773,11 +773,9 @@ static int execlists_context_pin(struct intel_engine_cs *engine,
>  	}
>  	GEM_BUG_ON(!ce->state);
>  
> -	flags = PIN_GLOBAL;
> +	flags = PIN_GLOBAL | PIN_HIGH;
>  	if (ctx->ggtt_offset_bias)
>  		flags |= PIN_OFFSET_BIAS | ctx->ggtt_offset_bias;
> -	if (i915_gem_context_is_kernel(ctx))
> -		flags |= PIN_HIGH;
>  
>  	ret = i915_vma_pin(ce->state, 0, GEN8_LR_CONTEXT_ALIGN, flags);
>  	if (ret)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index d3d1e64f2498..8ae78b79178f 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2004,7 +2004,7 @@ intel_ring_free(struct intel_ring *ring)
>  	kfree(ring);
>  }
>  
> -static int context_pin(struct i915_gem_context *ctx, unsigned int flags)
> +static int context_pin(struct i915_gem_context *ctx)
>  {
>  	struct i915_vma *vma = ctx->engine[RCS].state;
>  	int ret;
> @@ -2019,7 +2019,7 @@ static int context_pin(struct i915_gem_context *ctx, unsigned int flags)
>  			return ret;
>  	}
>  
> -	return i915_vma_pin(vma, 0, ctx->ggtt_alignment, PIN_GLOBAL | flags);
> +	return i915_vma_pin(vma, 0, ctx->ggtt_alignment, PIN_GLOBAL | PIN_HIGH);
>  }
>  
>  static int intel_ring_context_pin(struct intel_engine_cs *engine,
> @@ -2034,13 +2034,7 @@ static int intel_ring_context_pin(struct intel_engine_cs *engine,
>  		return 0;
>  
>  	if (ce->state) {
> -		unsigned int flags;
> -
> -		flags = 0;
> -		if (i915_gem_context_is_kernel(ctx))
> -			flags = PIN_HIGH;
> -
> -		ret = context_pin(ctx, flags);
> +		ret = context_pin(ctx);
>  		if (ret)
>  			goto error;
>  	}
> -- 
> 2.11.0
>
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