From: Jani Nikula <jani.nikula@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
David Binderman <linuxdev.baldrick@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
dcb314@hotmail.com, daniel.vetter@intel.com
Subject: Re: drivers/gpu/drm/i915/i915_reg.h:90:shift-overflow problem ?
Date: Mon, 30 May 2016 17:51:16 +0300 [thread overview]
Message-ID: <8760tvbnvf.fsf@intel.com> (raw)
In-Reply-To: <20160530141515.GJ30389@nuc-i3427.alporthouse.com>
On Mon, 30 May 2016, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Mon, May 30, 2016 at 11:32:59AM +0100, David Binderman wrote:
>> Hello there,
>>
>> drivers/gpu/drm/i915/i915_reg.h:90:28: warning: result of ‘65535 <<
>> 20’ requires 37 bits to represent, but ‘int’ only has 32 bits
>> [-Wshift-overflow=]
>>
>> Source code is
>>
>> #define BSM_MASK (0xFFFF << 20)
>>
>> Maybe better code
>>
>> #define BSM_MASK (((unsigned long) 0xFFFF) << 20)
>
> #define BSM_MASK (~0u << 20)
>
> It should be a 32bit mask. The current (with the exception of undefined
> behaviour of shifting into the signbit, fortunately gcc does what we
> expect) code is functionally current as the mask will be truncated to
> 32bits.
In the patch I used BSM_MASK (0xFFF << 20). It does have the UB of
shifting into the sign bit, but then we have loads of e.g. (1 << 31) in
i915_reg.h which is no different.
The original code before e10fa551ae37b had ~((1<<20) - 1).
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
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next prev parent reply other threads:[~2016-05-30 14:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-30 10:32 drivers/gpu/drm/i915/i915_reg.h:90:shift-overflow problem ? David Binderman
2016-05-30 12:54 ` [PATCH] drm/i915: fix BSM_MASK definition Jani Nikula
2016-05-30 14:15 ` drivers/gpu/drm/i915/i915_reg.h:90:shift-overflow problem ? Chris Wilson
2016-05-30 14:51 ` Jani Nikula [this message]
2016-05-31 9:56 ` ✗ Ro.CI.BAT: failure for drm/i915: fix BSM_MASK definition Patchwork
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