From: "Alex Bennée" <alex.bennee@linaro.org>
To: Alvise Rigo <a.rigo@virtualopensystems.com>
Cc: mttcg@listserver.greensocs.com, claudio.fontana@huawei.com,
qemu-devel@nongnu.org, pbonzini@redhat.com,
jani.kokkonen@huawei.com, tech@virtualopensystems.com,
rth@twiddle.net
Subject: Re: [Qemu-devel] [RFC v7 11/16] tcg: Create new runtime helpers for excl accesses
Date: Thu, 18 Feb 2016 16:16:55 +0000 [thread overview]
Message-ID: <8760xmdmdk.fsf@linaro.org> (raw)
In-Reply-To: <1454059965-23402-12-git-send-email-a.rigo@virtualopensystems.com>
Alvise Rigo <a.rigo@virtualopensystems.com> writes:
> Introduce a set of new runtime helpers to handle exclusive instructions.
> These helpers are used as hooks to call the respective LL/SC helpers in
> softmmu_llsc_template.h from TCG code.
>
> The helpers ending with an "a" make an alignment check.
>
> Suggested-by: Jani Kokkonen <jani.kokkonen@huawei.com>
> Suggested-by: Claudio Fontana <claudio.fontana@huawei.com>
> Signed-off-by: Alvise Rigo <a.rigo@virtualopensystems.com>
> ---
> Makefile.target | 2 +-
> include/exec/helper-gen.h | 3 ++
> include/exec/helper-proto.h | 1 +
> include/exec/helper-tcg.h | 3 ++
> tcg-llsc-helper.c | 104 ++++++++++++++++++++++++++++++++++++++++++++
> tcg-llsc-helper.h | 61 ++++++++++++++++++++++++++
I suspect we shouldn't be adding tcg specific stuff into the top level
of the directory. I know there is some stuff here but the general trend
is moving stuff into subdirs. I'll defer to the maintainers here.
> tcg/tcg-llsc-gen-helper.h | 67 ++++++++++++++++++++++++++++
> 7 files changed, 240 insertions(+), 1 deletion(-)
> create mode 100644 tcg-llsc-helper.c
> create mode 100644 tcg-llsc-helper.h
> create mode 100644 tcg/tcg-llsc-gen-helper.h
>
> diff --git a/Makefile.target b/Makefile.target
> index 34ddb7e..faf32a2 100644
> --- a/Makefile.target
> +++ b/Makefile.target
> @@ -135,7 +135,7 @@ obj-y += arch_init.o cpus.o monitor.o gdbstub.o balloon.o ioport.o numa.o
> obj-y += qtest.o bootdevice.o
> obj-y += hw/
> obj-$(CONFIG_KVM) += kvm-all.o
> -obj-y += memory.o cputlb.o
> +obj-y += memory.o cputlb.o tcg-llsc-helper.o
> obj-y += memory_mapping.o
> obj-y += dump.o
> obj-y += migration/ram.o migration/savevm.o
> diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h
> index 0d0da3a..f8483a9 100644
> --- a/include/exec/helper-gen.h
> +++ b/include/exec/helper-gen.h
> @@ -60,6 +60,9 @@ static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \
> #include "trace/generated-helpers.h"
> #include "trace/generated-helpers-wrappers.h"
> #include "tcg-runtime.h"
> +#if defined(CONFIG_SOFTMMU)
> +#include "tcg-llsc-gen-helper.h"
> +#endif
>
> #undef DEF_HELPER_FLAGS_0
> #undef DEF_HELPER_FLAGS_1
> diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
> index effdd43..90be2fd 100644
> --- a/include/exec/helper-proto.h
> +++ b/include/exec/helper-proto.h
> @@ -29,6 +29,7 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
> #include "helper.h"
> #include "trace/generated-helpers.h"
> #include "tcg-runtime.h"
> +#include "tcg/tcg-llsc-gen-helper.h"
>
> #undef DEF_HELPER_FLAGS_0
> #undef DEF_HELPER_FLAGS_1
> diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h
> index 79fa3c8..6228a7f 100644
> --- a/include/exec/helper-tcg.h
> +++ b/include/exec/helper-tcg.h
> @@ -38,6 +38,9 @@
> #include "helper.h"
> #include "trace/generated-helpers.h"
> #include "tcg-runtime.h"
> +#ifdef CONFIG_SOFTMMU
> +#include "tcg-llsc-gen-helper.h"
> +#endif
>
> #undef DEF_HELPER_FLAGS_0
> #undef DEF_HELPER_FLAGS_1
> diff --git a/tcg-llsc-helper.c b/tcg-llsc-helper.c
> new file mode 100644
> index 0000000..646b4ba
> --- /dev/null
> +++ b/tcg-llsc-helper.c
> @@ -0,0 +1,104 @@
> +/*
> + * Runtime helpers for atomic istruction emulation
> + *
> + * Copyright (c) 2015 Virtual Open Systems
> + *
> + * Authors:
> + * Alvise Rigo <a.rigo@virtualopensystems.com>
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include "exec/cpu_ldst.h"
> +#include "exec/helper-head.h"
> +#include "tcg-llsc-helper.h"
> +
> +#define LDEX_HELPER(SUFF, OPC, FUNC) \
> +uint32_t HELPER(ldlink_i##SUFF)(CPUArchState *env, target_ulong addr, \
> + uint32_t index) \
> +{ \
> + CPUArchState *state = env; \
> + TCGMemOpIdx op; \
> + \
> + op = make_memop_idx((OPC), index); \
> + \
> + return (uint32_t)FUNC(state, addr, op, GETRA()); \
> +}
> +
> +#define STEX_HELPER(SUFF, DATA_TYPE, OPC, FUNC) \
> +target_ulong HELPER(stcond_i##SUFF)(CPUArchState *env, target_ulong addr, \
> + uint32_t val, uint32_t index) \
> +{ \
> + CPUArchState *state = env; \
> + TCGMemOpIdx op; \
> + \
> + op = make_memop_idx((OPC), index); \
> + \
> + return (target_ulong)FUNC(state, addr, val, op, GETRA()); \
> +}
> +
> +
> +LDEX_HELPER(8, MO_UB, helper_ret_ldlinkub_mmu)
> +LDEX_HELPER(16_be, MO_BEUW, helper_be_ldlinkuw_mmu)
> +LDEX_HELPER(16_bea, MO_BEUW | MO_ALIGN, helper_be_ldlinkuw_mmu)
> +LDEX_HELPER(32_be, MO_BEUL, helper_be_ldlinkul_mmu)
> +LDEX_HELPER(32_bea, MO_BEUL | MO_ALIGN, helper_be_ldlinkul_mmu)
> +LDEX_HELPER(16_le, MO_LEUW, helper_le_ldlinkuw_mmu)
> +LDEX_HELPER(16_lea, MO_LEUW | MO_ALIGN, helper_le_ldlinkuw_mmu)
> +LDEX_HELPER(32_le, MO_LEUL, helper_le_ldlinkul_mmu)
> +LDEX_HELPER(32_lea, MO_LEUL | MO_ALIGN, helper_le_ldlinkul_mmu)
> +
> +STEX_HELPER(8, uint8_t, MO_UB, helper_ret_stcondb_mmu)
> +STEX_HELPER(16_be, uint16_t, MO_BEUW, helper_be_stcondw_mmu)
> +STEX_HELPER(16_bea, uint16_t, MO_BEUW | MO_ALIGN, helper_be_stcondw_mmu)
> +STEX_HELPER(32_be, uint32_t, MO_BEUL, helper_be_stcondl_mmu)
> +STEX_HELPER(32_bea, uint32_t, MO_BEUL | MO_ALIGN, helper_be_stcondl_mmu)
> +STEX_HELPER(16_le, uint16_t, MO_LEUW, helper_le_stcondw_mmu)
> +STEX_HELPER(16_lea, uint16_t, MO_LEUW | MO_ALIGN, helper_le_stcondw_mmu)
> +STEX_HELPER(32_le, uint32_t, MO_LEUL, helper_le_stcondl_mmu)
> +STEX_HELPER(32_lea, uint32_t, MO_LEUL | MO_ALIGN, helper_le_stcondl_mmu)
> +
> +#define LDEX_HELPER_64(SUFF, OPC, FUNC) \
> +uint64_t HELPER(ldlink_i##SUFF)(CPUArchState *env, target_ulong addr, \
> + uint32_t index) \
> +{ \
> + CPUArchState *state = env; \
> + TCGMemOpIdx op; \
> + \
> + op = make_memop_idx((OPC), index); \
> + \
> + return FUNC(state, addr, op, GETRA()); \
> +}
> +
> +#define STEX_HELPER_64(SUFF, OPC, FUNC) \
> +target_ulong HELPER(stcond_i##SUFF)(CPUArchState *env, target_ulong addr, \
> + uint64_t val, uint32_t index) \
> +{ \
> + CPUArchState *state = env; \
> + TCGMemOpIdx op; \
> + \
> + op = make_memop_idx((OPC), index); \
> + \
> + return (target_ulong)FUNC(state, addr, val, op, GETRA()); \
> +}
> +
> +LDEX_HELPER_64(64_be, MO_BEQ, helper_be_ldlinkq_mmu)
> +LDEX_HELPER_64(64_bea, MO_BEQ | MO_ALIGN, helper_be_ldlinkq_mmu)
> +LDEX_HELPER_64(64_le, MO_LEQ, helper_le_ldlinkq_mmu)
> +LDEX_HELPER_64(64_lea, MO_LEQ | MO_ALIGN, helper_le_ldlinkq_mmu)
> +
> +STEX_HELPER_64(64_be, MO_BEQ, helper_be_stcondq_mmu)
> +STEX_HELPER_64(64_bea, MO_BEQ | MO_ALIGN, helper_be_stcondq_mmu)
> +STEX_HELPER_64(64_le, MO_LEQ, helper_le_stcondq_mmu)
> +STEX_HELPER_64(64_lea, MO_LEQ | MO_ALIGN, helper_le_stcondq_mmu)
> diff --git a/tcg-llsc-helper.h b/tcg-llsc-helper.h
> new file mode 100644
> index 0000000..8f7adf0
> --- /dev/null
> +++ b/tcg-llsc-helper.h
> @@ -0,0 +1,61 @@
> +#ifndef HELPER_LLSC_HEAD_H
> +#define HELPER_LLSC_HEAD_H 1
> +
> +uint32_t HELPER(ldlink_i8)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint32_t HELPER(ldlink_i16_be)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint32_t HELPER(ldlink_i32_be)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint64_t HELPER(ldlink_i64_be)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint32_t HELPER(ldlink_i16_le)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint32_t HELPER(ldlink_i32_le)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint64_t HELPER(ldlink_i64_le)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +
> +target_ulong HELPER(stcond_i8)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i16_be)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i32_be)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i64_be)(CPUArchState *env, target_ulong addr,
> + uint64_t val, uint32_t index);
> +target_ulong HELPER(stcond_i16_le)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i32_le)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i64_le)(CPUArchState *env, target_ulong addr,
> + uint64_t val, uint32_t index);
> +
> +/* Aligned versions */
> +uint32_t HELPER(ldlink_i16_bea)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint32_t HELPER(ldlink_i32_bea)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint64_t HELPER(ldlink_i64_bea)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint32_t HELPER(ldlink_i16_lea)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint32_t HELPER(ldlink_i32_lea)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +uint64_t HELPER(ldlink_i64_lea)(CPUArchState *env, target_ulong addr,
> + uint32_t index);
> +
> +target_ulong HELPER(stcond_i16_bea)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i32_bea)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i64_bea)(CPUArchState *env, target_ulong addr,
> + uint64_t val, uint32_t index);
> +target_ulong HELPER(stcond_i16_lea)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i32_lea)(CPUArchState *env, target_ulong addr,
> + uint32_t val, uint32_t index);
> +target_ulong HELPER(stcond_i64_lea)(CPUArchState *env, target_ulong addr,
> + uint64_t val, uint32_t index);
> +
> +#endif
> diff --git a/tcg/tcg-llsc-gen-helper.h b/tcg/tcg-llsc-gen-helper.h
> new file mode 100644
> index 0000000..01c0a67
> --- /dev/null
> +++ b/tcg/tcg-llsc-gen-helper.h
> @@ -0,0 +1,67 @@
> +#if TARGET_LONG_BITS == 32
> +#define TYPE i32
> +#else
> +#define TYPE i64
> +#endif
> +
> +DEF_HELPER_3(ldlink_i8, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i16_be, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i32_be, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i64_be, i64, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i16_le, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i32_le, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i64_le, i64, env, TYPE, i32)
> +
> +DEF_HELPER_4(stcond_i8, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i16_be, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i32_be, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i64_be, TYPE, env, TYPE, i64, i32)
> +DEF_HELPER_4(stcond_i16_le, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i32_le, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i64_le, TYPE, env, TYPE, i64, i32)
> +
> +/* Aligned versions */
> +DEF_HELPER_3(ldlink_i16_bea, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i32_bea, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i64_bea, i64, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i16_lea, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i32_lea, i32, env, TYPE, i32)
> +DEF_HELPER_3(ldlink_i64_lea, i64, env, TYPE, i32)
> +
> +DEF_HELPER_4(stcond_i16_bea, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i32_bea, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i64_bea, TYPE, env, TYPE, i64, i32)
> +DEF_HELPER_4(stcond_i16_lea, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i32_lea, TYPE, env, TYPE, i32, i32)
> +DEF_HELPER_4(stcond_i64_lea, TYPE, env, TYPE, i64, i32)
> +
> +/* Convenient aliases */
> +#ifdef TARGET_WORDS_BIGENDIAN
> +#define gen_helper_stcond_i16 gen_helper_stcond_i16_be
> +#define gen_helper_stcond_i32 gen_helper_stcond_i32_be
> +#define gen_helper_stcond_i64 gen_helper_stcond_i64_be
> +#define gen_helper_ldlink_i16 gen_helper_ldlink_i16_be
> +#define gen_helper_ldlink_i32 gen_helper_ldlink_i32_be
> +#define gen_helper_ldlink_i64 gen_helper_ldlink_i64_be
> +#define gen_helper_stcond_i16a gen_helper_stcond_i16_bea
> +#define gen_helper_stcond_i32a gen_helper_stcond_i32_bea
> +#define gen_helper_stcond_i64a gen_helper_stcond_i64_bea
> +#define gen_helper_ldlink_i16a gen_helper_ldlink_i16_bea
> +#define gen_helper_ldlink_i32a gen_helper_ldlink_i32_bea
> +#define gen_helper_ldlink_i64a gen_helper_ldlink_i64_bea
> +#else
> +#define gen_helper_stcond_i16 gen_helper_stcond_i16_le
> +#define gen_helper_stcond_i32 gen_helper_stcond_i32_le
> +#define gen_helper_stcond_i64 gen_helper_stcond_i64_le
> +#define gen_helper_ldlink_i16 gen_helper_ldlink_i16_le
> +#define gen_helper_ldlink_i32 gen_helper_ldlink_i32_le
> +#define gen_helper_ldlink_i64 gen_helper_ldlink_i64_le
> +#define gen_helper_stcond_i16a gen_helper_stcond_i16_lea
> +#define gen_helper_stcond_i32a gen_helper_stcond_i32_lea
> +#define gen_helper_stcond_i64a gen_helper_stcond_i64_lea
> +#define gen_helper_ldlink_i16a gen_helper_ldlink_i16_lea
> +#define gen_helper_ldlink_i32a gen_helper_ldlink_i32_lea
> +#define gen_helper_ldlink_i64a gen_helper_ldlink_i64_lea
> +#endif
> +
> +#undef TYPE
--
Alex Bennée
next prev parent reply other threads:[~2016-02-18 16:17 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-29 9:32 [Qemu-devel] [RFC v7 00/16] Slow-path for atomic instruction translation Alvise Rigo
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 01/16] exec.c: Add new exclusive bitmap to ram_list Alvise Rigo
2016-02-11 13:00 ` Alex Bennée
2016-02-11 13:21 ` alvise rigo
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 02/16] softmmu: Simplify helper_*_st_name, wrap unaligned code Alvise Rigo
2016-02-11 13:07 ` Alex Bennée
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 03/16] softmmu: Simplify helper_*_st_name, wrap MMIO code Alvise Rigo
2016-02-11 13:15 ` Alex Bennée
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 04/16] softmmu: Simplify helper_*_st_name, wrap RAM code Alvise Rigo
2016-02-11 13:18 ` Alex Bennée
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 05/16] softmmu: Add new TLB_EXCL flag Alvise Rigo
2016-02-11 13:18 ` Alex Bennée
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 06/16] qom: cpu: Add CPUClass hooks for exclusive range Alvise Rigo
2016-02-11 13:22 ` Alex Bennée
2016-02-18 13:53 ` alvise rigo
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 07/16] softmmu: Add helpers for a new slowpath Alvise Rigo
2016-02-11 16:33 ` Alex Bennée
2016-02-18 13:58 ` alvise rigo
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 08/16] softmmu: Honor the new exclusive bitmap Alvise Rigo
2016-02-16 17:39 ` Alex Bennée
2016-02-18 14:18 ` alvise rigo
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 09/16] softmmu: Include MMIO/invalid exclusive accesses Alvise Rigo
2016-02-16 17:49 ` Alex Bennée
2016-02-18 14:18 ` alvise rigo
2016-02-18 16:26 ` Alex Bennée
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 10/16] softmmu: Protect MMIO exclusive range Alvise Rigo
2016-02-17 18:55 ` Alex Bennée
2016-02-18 14:15 ` alvise rigo
2016-02-18 16:25 ` Alex Bennée
2016-03-07 18:13 ` alvise rigo
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 11/16] tcg: Create new runtime helpers for excl accesses Alvise Rigo
2016-02-18 16:16 ` Alex Bennée [this message]
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 12/16] configure: Use slow-path for atomic only when the softmmu is enabled Alvise Rigo
2016-02-18 16:40 ` Alex Bennée
2016-02-18 16:43 ` Alex Bennée
2016-03-07 17:21 ` alvise rigo
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 13/16] softmmu: Add history of excl accesses Alvise Rigo
2016-02-16 17:07 ` Alex Bennée
2016-02-18 14:17 ` alvise rigo
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 14/16] target-arm: translate: Use ld/st excl for atomic insns Alvise Rigo
2016-02-18 17:02 ` Alex Bennée
2016-03-07 18:39 ` alvise rigo
2016-03-07 20:06 ` Alex Bennée
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 15/16] target-arm: cpu64: use custom set_excl hook Alvise Rigo
2016-02-18 18:19 ` Alex Bennée
2016-01-29 9:32 ` [Qemu-devel] [RFC v7 16/16] target-arm: aarch64: add atomic instructions Alvise Rigo
2016-02-19 11:34 ` Alex Bennée
2016-02-19 11:44 ` [Qemu-devel] [RFC v7 00/16] Slow-path for atomic instruction translation Alex Bennée
2016-02-19 12:01 ` alvise rigo
2016-02-19 12:19 ` Alex Bennée
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