From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Deepak M <m.deepak@intel.com>,
Daniel Vetter <daniel.vetter@intel.com>,
Yetunde Adebisi <yetundex.adebisi@intel.com>
Subject: Re: [MIPI CABC 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT
Date: Wed, 25 Nov 2015 14:29:47 +0200 [thread overview]
Message-ID: <87610q8dok.fsf@intel.com> (raw)
In-Reply-To: <1447705088-2395-2-git-send-email-m.deepak@intel.com>
On Mon, 16 Nov 2015, Deepak M <m.deepak@intel.com> wrote:
> For dual link panel scenarios there are new fileds added in the
> VBT which indicate on which port the PWM cntrl and CABC ON/OFF
> commands needs to be sent.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
> Signed-off-by: Deepak M <m.deepak@intel.com>
> ---
> drivers/gpu/drm/i915/intel_bios.c | 13 +++++++++++++
> drivers/gpu/drm/i915/intel_bios.h | 5 ++++-
> drivers/gpu/drm/i915/intel_dsi.h | 2 ++
> 3 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index ce82f9c..2ef8721 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -793,6 +793,19 @@ parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
> return;
> }
>
> + /*
> + * These below bits will inform us on which port the panel blk_cntrl and
> + * CABC ON/OFF commands needs to be sent in case of dual link panels
> + * u16 dl_cabc_port:2;
> + * u16 pwm_bkl_ctrl:2;
> + * But these are introduced from the VBT version 197 onwards, so making
> + * sure that these bits are zero in the pervious versions.
> + */
> + if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
> + dev_priv->vbt.dsi.config->dl_cabc_port = 0;
> + dev_priv->vbt.dsi.config->pwm_bkl_ctrl = 0;
> + }
> +
dev_priv->vbt is zero by default, so none of the above is needed.
> /* We have mandatory mipi config blocks. Initialize as generic panel */
> dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
> index 7ec8c9a..9283969 100644
> --- a/drivers/gpu/drm/i915/intel_bios.h
> +++ b/drivers/gpu/drm/i915/intel_bios.h
> @@ -832,7 +832,10 @@ struct mipi_config {
> u16 dual_link:2;
> u16 lane_cnt:2;
> u16 pixel_overlap:3;
> - u16 rsvd3:9;
> + u16 rgb_flip:1;
> + u16 dl_cabc_port:2;
> + u16 pwm_bkl_ctrl:2;
> + u16 rsvd3:4;
>
> u16 rsvd4;
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index e6cb252..4fde83b 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -74,6 +74,8 @@ struct intel_dsi {
>
> u8 escape_clk_div;
> u8 dual_link;
> + u8 bkl_dcs_ports;
> + u8 pwm_blk_ctrl;
This is a much more natural place to explain what these things do.
> u8 pixel_overlap;
> u32 port_bits;
> u32 bw_timer;
--
Jani Nikula, Intel Open Source Technology Center
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next prev parent reply other threads:[~2015-11-25 12:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-16 20:18 [MIPI CABC 0/2] CABC patch list Deepak M
2015-11-16 20:18 ` [MIPI CABC 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT Deepak M
2015-11-25 12:29 ` Jani Nikula [this message]
2015-11-25 12:32 ` Jani Nikula
2015-11-16 20:18 ` [MIPI CABC 2/2] drm/i915: CABC support for backlight control Deepak M
2015-11-25 12:26 ` Jani Nikula
-- strict thread matches above, loose matches on Subject: below --
2016-03-22 5:41 [MIPI CABC 0/2] CABC patch list Deepak M
2016-03-22 5:41 ` [MIPI CABC 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT Deepak M
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