From: Alex Bennée <alex.bennee@linaro.org>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com,
rob.herring@linaro.org, aggelerf@ethz.ch, qemu-devel@nongnu.org,
agraf@suse.de, blauwirbel@gmail.com, john.williams@xilinx.com,
greg.bellows@linaro.org, pbonzini@redhat.com,
christoffer.dall@linaro.org, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v1 13/16] target-arm: A64: Emulate the HVC insn
Date: Wed, 04 Jun 2014 08:26:51 +0100 [thread overview]
Message-ID: <8761khrv7o.fsf@linaro.org> (raw)
In-Reply-To: <20140604070157.GG3378@toto>
Edgar E. Iglesias writes:
> On Tue, Jun 03, 2014 at 11:41:25AM +0100, Alex Bennée wrote:
>>
>> Edgar E. Iglesias writes:
>> > static inline void arm_log_exception(int idx)
>> > @@ -204,6 +205,11 @@ static inline uint32_t syn_aa64_svc(uint32_t imm16)
>> > return (EC_AA64_SVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff);
>> > }
>> >
>> > +static inline uint32_t syn_aa64_hvc(uint32_t imm16)
>> > +{
>> > + return (EC_AA64_HVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff);
>> > +}
>>
>> The mask seems superfluous (as it is for arm_log_exception)
>
> Sorry, can you clarify what you mean here? Are you refering to the imm16?
Yes the imm16. It's the result of an extract32(..,..,16) so I can't see
how it wouldn't already be correctly masked.
--
Alex Bennée
next prev parent reply other threads:[~2014-06-04 7:27 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1401434911-26992-1-git-send-email-edgar.iglesias@gmail.com>
[not found] ` <1401434911-26992-15-git-send-email-edgar.iglesias@gmail.com>
2014-06-02 1:30 ` [Qemu-devel] [PATCH v1 14/16] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
[not found] ` <CAOgzsHWqsegcukD8Q45daqbWPSNWoAbcYZcUm1Qe7Wgf=f4FxA@mail.gmail.com>
[not found] ` <20140531034925.GP18802@zapo.iiNet>
2014-06-02 16:12 ` Greg Bellows
2014-06-04 2:31 ` Edgar E. Iglesias
[not found] ` <1401434911-26992-2-git-send-email-edgar.iglesias@gmail.com>
2014-06-02 9:40 ` [Qemu-devel] [PATCH v1 01/16] target-arm: A64: Break out aarch64_save/restore_sp Alex Bennée
[not found] ` <1401434911-26992-3-git-send-email-edgar.iglesias@gmail.com>
2014-06-02 9:52 ` [Qemu-devel] [PATCH v1 02/16] target-arm: A64: Respect SPSEL in ERET SP restore Alex Bennée
[not found] ` <1401434911-26992-4-git-send-email-edgar.iglesias@gmail.com>
2014-06-02 9:55 ` [Qemu-devel] [PATCH v1 03/16] target-arm: A64: Respect SPSEL when taking exceptions Alex Bennée
[not found] ` <1401434911-26992-5-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:21 ` [Qemu-devel] [PATCH v1 04/16] target-arm: Make far_el1 an array Alex Bennée
2014-06-03 12:42 ` Greg Bellows
2014-06-03 13:35 ` Alex Bennée
2014-06-03 13:50 ` Greg Bellows
[not found] ` <1401434911-26992-7-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:22 ` [Qemu-devel] [PATCH v1 06/16] target-arm: Add FAR_EL2 and 3 Alex Bennée
2014-06-04 2:33 ` Edgar E. Iglesias
2014-06-04 7:55 ` Alex Bennée
2014-06-04 15:08 ` Edgar E. Iglesias
[not found] ` <1401434911-26992-8-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:27 ` [Qemu-devel] [PATCH v1 07/16] target-arm: Add HCR_EL2 Alex Bennée
2014-06-04 6:52 ` Edgar E. Iglesias
[not found] ` <1401434911-26992-9-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:30 ` [Qemu-devel] [PATCH v1 08/16] target-arm: Add SCR_EL3 Alex Bennée
[not found] ` <1401434911-26992-11-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:32 ` [Qemu-devel] [PATCH v1 10/16] target-arm: Break out exception masking to a separate func Alex Bennée
2014-06-04 6:55 ` Edgar E. Iglesias
[not found] ` <1401434911-26992-13-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:37 ` [Qemu-devel] [PATCH v1 12/16] target-arm: A64: Correct updates to FAR and ESR on exceptions Alex Bennée
[not found] ` <1401434911-26992-14-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:41 ` [Qemu-devel] [PATCH v1 13/16] target-arm: A64: Emulate the HVC insn Alex Bennée
2014-06-04 7:01 ` Edgar E. Iglesias
2014-06-04 7:26 ` Alex Bennée [this message]
2014-06-04 15:03 ` Edgar E. Iglesias
[not found] ` <1401434911-26992-16-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:47 ` [Qemu-devel] [PATCH v1 15/16] target-arm: Add IRQ and FIQ routing to EL2 and 3 Alex Bennée
[not found] ` <1401434911-26992-12-git-send-email-edgar.iglesias@gmail.com>
2014-06-08 15:51 ` [Qemu-devel] [PATCH v1 11/16] target-arm: Don't take interrupts targeting lower ELs Aggeler Fabian
2014-06-08 23:43 ` Edgar E. Iglesias
2014-06-10 17:10 ` Aggeler Fabian
2014-08-01 14:35 ` [Qemu-devel] [PATCH v1 00/16] target-arm: Parts of the AArch64 EL2/3 exception model Peter Maydell
2014-08-01 14:38 ` Peter Maydell
2014-08-05 8:53 ` Edgar E. Iglesias
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