From: Kalle Valo <kvalo@qca.qualcomm.com>
To: Ben Greear <greearb@candelatech.com>
Cc: ath10k@lists.infradead.org
Subject: Re: DMAR faults?
Date: Mon, 28 Oct 2013 11:21:13 +0200 [thread overview]
Message-ID: <8761sheoom.fsf@kamboji.qca.qualcomm.com> (raw)
In-Reply-To: <5266B204.8030901@candelatech.com> (Ben Greear's message of "Tue, 22 Oct 2013 10:12:36 -0700")
Ben Greear <greearb@candelatech.com> writes:
> Any idea what this means? The 05:00.0 is the ath10k device...
>
> ath10k_pci 0000:05:00.0: BAR 0: assigned [mem 0xf4400000-0xf45fffff 64bit]
> ath10k: MSI-X interrupt handling (8 intrs)
> dmar: DRHD: handling fault status reg 3
> dmar: DMAR:[DMA Write] Request device [05:00.0] fault addr ffe46000
> DMAR:[fault reason 02] Present bit in context entry is clear
I guess you have iommu enabled? I think that means ath10k device tried
to write to a memory area which was not mapped by the driver.
> ath10k: Hardware name qca988x hw2.0 version 0x4100016c
> ath10k: UART prints disabled
> ath10k: firmware 999.999.0.636 booted
> ath10k: htt target version 2.1
> ath10k: Completion buffers are full
Timestamps would be really useful. How fast did you get that completion
buffers are full message?
--
Kalle Valo
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next prev parent reply other threads:[~2013-10-28 9:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-22 17:12 DMAR faults? Ben Greear
2013-10-28 9:21 ` Kalle Valo [this message]
2013-10-28 9:24 ` Michal Kazior
2013-10-28 14:49 ` Ben Greear
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