Re: [PATCH] I2C: OMAP: fix the clearing of interrupts

[Kevin Hilman <khilman-l0cyMroinI0@public.gmane.org>]

Shubhrajyoti D <shubhrajyoti-l0cyMroinI0@public.gmane.org> writes:

> The register IRQENABLE_CLR is a bit map of interrupt events.
> All the bits have to be cleared to clear the interrupts.
>
> Signed-off-by: Vikram Pandita <vikram.pandita-l0cyMroinI0@public.gmane.org>
> Signed-off-by: Shubhrajyoti D <shubhrajyoti-l0cyMroinI0@public.gmane.org>
> ---
>  drivers/i2c/busses/i2c-omap.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 2dfb631..c7c6bb2 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -309,7 +309,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
>  
>  	dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
>  	if (dev->rev >= OMAP_I2C_REV_ON_4430)
> -		omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
> +		omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 0x6FFF);

While fixing, please #define this mask, and add a comment to why all the
bits set in the mask.

Thanks,

Kevin

>  	else
>  		omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);