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b=sBiw5355T8qecBt/FhRdqcqiLUzN4WN3rOzCltRoZQ2lTKcr20/sNS4552HNNYRJIAM5je8RJntIJFKbajXoLDlq4PKrpdjQZ1RSZZPG2331YERfXr5d+GetWnLj7Jp2baPm+hzWrNvuf86wTQEgguR/YA7P8KdxYQm83TlPMfwKd569WZK4Ofmla9iGXvdZP+fpRGwD5jqAmJxnvdFQyrjTZo5nFywmoWIsMtcumVXoRKqEiPL9+d6JJQSrWikOKYtFHAeu13X1nnttTa0S1XijLA8Kj3IQol1mD4xK9ivxvP2du/DH6B/4AlMKrVcO9Lxiqyic6kyAh3FDRqTKxg== From: Volodymyr Babchuk To: Mykola Kvach CC: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel Subject: Re: [PATCH v5 4/4] xen/arm: vgic: free eSPIs using the bitmap index Thread-Topic: [PATCH v5 4/4] xen/arm: vgic: free eSPIs using the bitmap index Thread-Index: AQHdTGdvGfT1E9oBQkCUIpVOvCgdbA== Date: Thu, 24 Sep 2026 22:55:53 +0000 Message-ID: <877bka1cp3.fsf@epam.com> References: <8c61cf31b69377737d1f688bded43d123ac55d00.1790160605.git.mykola_kvach@epam.com> In-Reply-To: <8c61cf31b69377737d1f688bded43d123ac55d00.1790160605.git.mykola_kvach@epam.com> (Mykola Kvach's message of "Thu, 24 Sep 2026 23:57:56 +0300") Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: mu4e 1.14.3; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VE1PR03MB6078.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9fef860d-dd31-4cf5-daf4-08df1a8efc8d X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2026 22:55:53.4313 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: OrV94xfIdFA5Q61vUb5bJngQsbf6BzDPVlOacEj/yVlYuuTNYBAH1EeepG0+NdcfMvtsUXUhujknEn/u8XE6cKicraR7h4iQE3cVIz9q+Uk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU5PR03MB10302 X-purgate-ID: tlsNG-16d1c6/1790290556-F440377B-AF5C30B9/0/0 X-purgate-type: clean X-purgate-size: 5350 Hi Mykola, Mykola Kvach writes: > The allocated_irqs bitmap in the existing vGIC implementation stores eSPI > allocation bits immediately after the regular vIRQ bits. > vgic_reserve_virq() converts an eSPI INTID to this compressed bitmap inde= x, > but vgic_free_virq() used the raw INTID. > > Freeing INTID 4096 therefore clears bit 4096 instead of the first eSPI bi= t. > This writes beyond allocated_irqs and leaves the intended eSPI bit set. > Valid eSPIs reach this path during DOMCTL bind failure cleanup and unbind= , > and during vPL011 teardown. > > Add virq_to_idx(), the inverse of idx_to_virq(), and use it when reservin= g > and freeing vIRQs. Use vgic_is_valid_line() for the validity checks when > reserving and freeing vIRQs in both vGIC implementations. > > Fixes: bdde400c6e1b ("xen/arm: vgic: add resource management for extended= SPIs") > Signed-off-by: Mykola Kvach > Reviewed-by: Michal Orzel > --- > Changes in v5: > - Add the vgic_is_valid_line() guard to vgic_free_virq() in the new > vGIC implementation and use the same helper in vgic_reserve_virq(). > > Changes in v4: > - Document the compressed bitmap layout with an ASCII diagram above the > conversion helpers and refer to struct vgic_dist for the full layout. > > Changes in v3: > - Adapt virq_to_idx() to the configuration-neutral is_espi() helper. > > Changes in v2: > - Call is_espi() without a configuration guard. > --- > xen/arch/arm/vgic.c | 42 +++++++++++++++++++++++++++++----------- > xen/arch/arm/vgic/vgic.c | 5 ++++- > 2 files changed, 35 insertions(+), 12 deletions(-) > > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c > index 0ba13e18da..acded6a40f 100644 > --- a/xen/arch/arm/vgic.c > +++ b/xen/arch/arm/vgic.c > @@ -25,6 +25,21 @@ > #include > =20 > =20 > +/* > + * The allocated_irqs bitmap is compressed: eSPI bits immediately follow > + * regular IRQ bits, skipping the gap in the INTID space. > + * > + * +-----------+-----------+-------------------+-------------------+ > + * | SGIs | PPIs | SPIs | eSPIs | > + * +-----------+-----------+-------------------+-------------------+ > + * 0 16 32 vgic_num_irqs(d) > + * > + * INTID ESPI_BASE_INTID maps to bitmap index vgic_num_irqs(d). > + * The following idx_to_virq() and virq_to_idx() convert between INTIDs > + * and bitmap indexes. > + * > + * See also the allocated_irqs comment in struct vgic_dist. > + */ > static inline unsigned int idx_to_virq(struct domain *d, unsigned int id= x) > { > if ( idx >=3D vgic_num_irqs(d) ) > @@ -33,6 +48,16 @@ static inline unsigned int idx_to_virq(struct domain *= d, unsigned int idx) > return idx; > } > =20 > +static inline unsigned int virq_to_idx(struct domain *d, unsigned int vi= rq) > +{ > + ASSERT(IS_ENABLED(CONFIG_GICV3_ESPI) || !is_espi(virq)); > + > + if ( IS_ENABLED(CONFIG_GICV3_ESPI) && is_espi(virq) ) > + return espi_intid_to_idx(virq) + vgic_num_irqs(d); > + > + return virq; > +} > + > bool vgic_is_valid_line(struct domain *d, unsigned int virq) > { > #ifdef CONFIG_GICV3_ESPI > @@ -854,19 +879,11 @@ bool vgic_emulate(struct cpu_user_regs *regs, union= hsr hsr) > =20 > bool vgic_reserve_virq(struct domain *d, unsigned int virq) > { > - unsigned int idx =3D virq; > - > if ( !vgic_is_valid_line(d, virq) ) > return false; > =20 > - if ( is_espi(virq) ) > - { > - unsigned int num_regular_irqs =3D vgic_num_irqs(d); > - > - idx =3D espi_intid_to_idx(virq) + num_regular_irqs; > - } > - > - return !test_and_set_bit(idx, d->arch.vgic.allocated_irqs); > + return !test_and_set_bit(virq_to_idx(d, virq), > + d->arch.vgic.allocated_irqs); > } > =20 > int vgic_allocate_virq(struct domain *d, bool spi) > @@ -903,7 +920,10 @@ int vgic_allocate_virq(struct domain *d, bool spi) > =20 > void vgic_free_virq(struct domain *d, unsigned int virq) > { > - clear_bit(virq, d->arch.vgic.allocated_irqs); > + if ( !vgic_is_valid_line(d, virq) ) > + return; I don't think that silently failing is a good idea. It needs an ASSERT() at least. > + > + clear_bit(virq_to_idx(d, virq), d->arch.vgic.allocated_irqs); > } > =20 > unsigned int vgic_max_vcpus(unsigned int domctl_vgic_version) > diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c > index ba029b8a3b..84212bbefe 100644 > --- a/xen/arch/arm/vgic/vgic.c > +++ b/xen/arch/arm/vgic/vgic.c > @@ -712,7 +712,7 @@ bool vgic_evtchn_irq_pending(struct vcpu *v) > =20 > bool vgic_reserve_virq(struct domain *d, unsigned int virq) > { > - if ( virq >=3D vgic_num_irqs(d) ) > + if ( !vgic_is_valid_line(d, virq) ) > return false; > =20 > return !test_and_set_bit(virq, d->arch.vgic.allocated_irqs); > @@ -756,6 +756,9 @@ int vgic_allocate_virq(struct domain *d, bool spi) > =20 > void vgic_free_virq(struct domain *d, unsigned int virq) > { > + if ( !vgic_is_valid_line(d, virq) ) > + return; > + > clear_bit(virq, d->arch.vgic.allocated_irqs); > } --=20 WBR, Volodymyr=