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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand Subject: Re: [PATCH v3 5/7] vpci: add SR-IOV support for PVH Dom0 Thread-Topic: [PATCH v3 5/7] vpci: add SR-IOV support for PVH Dom0 Thread-Index: AQHcyClfuk/Yqk/9/E2oGahG1JP+sg== Date: Mon, 11 May 2026 14:10:08 +0000 Message-ID: <877bparq9t.fsf@epam.com> References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> In-Reply-To: (Jan Beulich's message of "Fri, 8 May 2026 07:52:04 +0200") Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: AM6PR03MB6070:EE_|AM9PR03MB7850:EE_ x-ms-office365-filtering-correlation-id: 20a6b063-9825-4ca8-6df2-08deaf6701f6 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|1800799024|366016|42112799006|376014|38070700021|11063799003|56012099003|22082099003|18002099003; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM6PR03MB6070.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 20a6b063-9825-4ca8-6df2-08deaf6701f6 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 May 2026 14:10:08.2545 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: VOW8xu4AfxP0j6Cqf5LDcJBu4WK/OvgbtdijC4OcgXaWlSTFuUn1k2CRIHVx4U2kmTjOd3FewP3u6X2yCvYoOwmmQqwR7pFuUMSpSi53Yo4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7850 X-purgate-ID: tlsNG-720697/1778508610-8256B161-1303DAF6/0/0 X-purgate-type: clean X-purgate-size: 4202 Hi Jan, Jan Beulich writes: > On 07.05.2026 22:40, Volodymyr Babchuk wrote: >> Jan Beulich writes: >>> On 06.05.2026 11:39, Mykyta Poturai wrote: >>>> On 5/4/26 08:37, Jan Beulich wrote: >>>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>>> From: Stewart Hildebrand >>>>>>>> >>>>>>>> This code is expected to only be used by privileged domains, >>>>>>>> unprivileged domains should not get access to the SR-IOV capabilit= y. >>>>>>>> >>>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to acc= ount >>>>>>>> for possible changes in the system page size register. Also force = VFs to >>>>>>>> always use emulated reads for command register, this is needed to >>>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>>> >>>>>>> This apparently refers to the change to vpci_init_header(). Writes = are >>>>>>> already intercepted. How would a read lead to accidental BAR unmap?= Even >>>>>>> for writes I don't see how a VF driver could accidentally unmap BAR= s, as >>>>>>> the memory decode bit there is hardwired to 0. >>>>>>> >>>>>>>> Discovery of VFs is >>>>>>>> done by Dom0, which must register them with Xen. >>>>>>> >>>>>>> If we intercept control register writes, why would we still require >>>>>>> Dom0 to report the VFs that appear? >>>>>>> >>>>>> >>>>>> Sorry, I don't understand this question. You specifically requested = this >>>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>>> >>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>>> returning "true" >>>>>> > from vpci_process_pending() until the time has passed? This imo = is a >>>>>> no-go. You >>>>>> > want to set a timer and put the vCPU to sleep, to wake it up aga= in >>>>>> when the >>>>>> > timer has expired. That'll then eliminate the need for the >>>>>> not-so-nice patch 4. >>>>>> >>>>>> > Question is whether we need to actually go this far (right away)= . I >>>>>> expect you >>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the= hardware >>>>>> > domain, can't we trust it to set things up correctly, just like = we >>>>>> trust it in >>>>>> > a number of other aspects? >>>>> >>>>> How's any of this related to the question I raised here, or your repl= y >>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created= . >>>>> Why still demand Dom0 to report them then? >>>>> >>>> >>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit = is=20 >>>> set to become alive. We discussed in the V2 that it is not acceptable = to=20 >>>> do a required 100ms wait in Xen while blocking a domain. And not doing= =20 >>>> that blocking would require some mechanism to only allow a domain to r= un=20 >>>> for precisely 99(or more?)ms. You yourself suggested that we can trust= =20 >>>> the hardware domain with registering VFs if we already trust it with=20 >>>> other PCI-related stuff. Did you change your mind, or am I completely= =20 >>>> misunderstanding this question? >>> >>> No, I still think that we can trust hwdom enough. Nevertheless we shoul= d >>> aim at being independent of it where possible. And I seem to recall tha= t >>> I had also outlined an approach how to avoid spin-waiting for 100ms in >>> the hypervisor. >>=20 >> I want to clarify: you are telling that Xen should not wait for hwdom to >> report VFs and instead create them by itself. Is this correct? > > If that's technically possible, yes. Okay, so let's clear this. If I remember correct, you discussed this with Mykyta in the previous version and suggested to put the vCPU to sleep for 100ms. I don't think that this is a good idea, because guest kernel will not be happy about that. So, IMO, it is better to just allows the guest to tell Xen when VFs are ready. Or maybe I am missing something and you had some another idea? --=20 WBR, Volodymyr=