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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
	intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 5/5] drm/i915: Add Wa_14021768792 as per WA framework
Date: Fri, 06 Sep 2024 12:11:57 +0300	[thread overview]
Message-ID: <877cbpno2q.fsf@intel.com> (raw)
In-Reply-To: <20240905115505.3629087-6-ankit.k.nautiyal@intel.com>

On Thu, 05 Sep 2024, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Modify the condition for WA as per Xe WA framework.

Please don't. This won't work in the future. See [1].

BR,
Jani.


[1] https://lore.kernel.org/r/87frqdnp09.fsf@intel.com


>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c    | 4 ++--
>  drivers/gpu/drm/i915/display/intel_display_wa.h | 2 ++
>  drivers/gpu/drm/xe/display/xe_display_wa.c      | 5 +++++
>  drivers/gpu/drm/xe/xe_wa_oob.rules              | 1 +
>  4 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index f55a85f04ce5..4496ba30d64d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -75,6 +75,7 @@
>  #include "intel_display_driver.h"
>  #include "intel_display_power.h"
>  #include "intel_display_types.h"
> +#include "intel_display_wa.h"
>  #include "intel_dmc.h"
>  #include "intel_dp.h"
>  #include "intel_dp_link_training.h"
> @@ -3436,8 +3437,7 @@ int bmg_can_bypass_m_n_limit(struct intel_display *display,
>  {
>  	struct drm_i915_private *i915 = to_i915(display->drm);
>  
> -	if (DISPLAY_VER(display) != 14 || !IS_DGFX(i915) ||
> -	    !IS_DISPLAY_STEP(display, STEP_C0, STEP_FOREVER))
> +	if (!intel_display_needs_wa_14021768792(i915))
>  		return false;
>  
>  	if (pipe != PIPE_A)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
> index be644ab6ae00..10c1b5787d05 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> @@ -14,8 +14,10 @@ void intel_display_wa_apply(struct drm_i915_private *i915);
>  
>  #ifdef I915
>  static inline bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915) { return false; }
> +static inline bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915) { return false; }
>  #else
>  bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915);
> +bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915);
>  #endif
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/display/xe_display_wa.c b/drivers/gpu/drm/xe/display/xe_display_wa.c
> index 68e3d1959ad6..c4728e61e190 100644
> --- a/drivers/gpu/drm/xe/display/xe_display_wa.c
> +++ b/drivers/gpu/drm/xe/display/xe_display_wa.c
> @@ -14,3 +14,8 @@ bool intel_display_needs_wa_16023588340(struct drm_i915_private *i915)
>  {
>  	return XE_WA(xe_root_mmio_gt(i915), 16023588340);
>  }
> +
> +bool intel_display_needs_wa_14021768792(struct drm_i915_private *i915)
> +{
> +	return XE_WA(xe_root_mmio_gt(i915), 14021768792);
> +}
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index 920ca5060146..a7cc2c2d98d0 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -37,3 +37,4 @@
>  16023588340	GRAPHICS_VERSION(2001)
>  14019789679	GRAPHICS_VERSION(1255)
>  		GRAPHICS_VERSION_RANGE(1270, 2004)
> +14021768792	PLATFORM(BATTLEMAGE), GRAPHICS_STEP(C0, FOREVER)

-- 
Jani Nikula, Intel

  reply	other threads:[~2024-09-06  9:12 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-05 11:55 [PATCH 0/5] Implement Wa_14021768792 to bypass m_n ratio limit Ankit Nautiyal
2024-09-05 11:55 ` [PATCH 1/5] drm/i915/display: Add bits for link_n_exended for DISPLAY >= 14 Ankit Nautiyal
2024-09-05 13:22   ` Jani Nikula
2024-09-05 14:38     ` Nautiyal, Ankit K
2024-09-05 11:55 ` [PATCH 2/5] drm/i915/display: Limit m/n ratio to 10 for display > 12 Ankit Nautiyal
2024-09-05 11:55 ` [PATCH 3/5] drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10 Ankit Nautiyal
2024-09-05 11:55 ` [PATCH 4/5] drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n " Ankit Nautiyal
2024-09-05 11:55 ` [PATCH 5/5] drm/i915: Add Wa_14021768792 as per WA framework Ankit Nautiyal
2024-09-06  9:11   ` Jani Nikula [this message]
2024-09-05 11:59 ` ✓ CI.Patch_applied: success for Implement Wa_14021768792 to bypass m_n ratio limit Patchwork
2024-09-05 11:59 ` ✗ CI.checkpatch: warning " Patchwork
2024-09-05 12:00 ` ✓ CI.KUnit: success " Patchwork
2024-09-05 12:13 ` ✓ CI.Build: " Patchwork
2024-09-05 12:18 ` ✓ CI.Hooks: " Patchwork
2024-09-05 12:20 ` ✗ CI.checksparse: warning " Patchwork
2024-09-05 12:39 ` ✓ CI.BAT: success " Patchwork
2024-09-05 15:05 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2024-09-05 15:05 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-09-05 15:35 ` ✓ Fi.CI.BAT: success " Patchwork
2024-09-07  6:20 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-09-07 11:59 ` ✓ CI.FULL: success " Patchwork

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