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Fri, 5 May 2023 10:01:48 +0000 (UTC) From: Kurt Kanzenbach To: Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org In-Reply-To: <20230504235233.1850428-5-vinicius.gomes@intel.com> References: <20230504235233.1850428-1-vinicius.gomes@intel.com> <20230504235233.1850428-5-vinicius.gomes@intel.com> Date: Fri, 05 May 2023 11:51:49 +0200 Message-ID: <877ctnumve.fsf@kurt> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1683280310; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=erVi4LQ4PMq8WdS9Oke29YWNFu7kXhpRXvXBuGq1YUw=; b=Kwv0H+NFsJ93J1OzknEXL1dp6+CgwlrEHID1vRr7Et7aWgKgq/jFAcW47vnQfIrWHQIPtO SyUXgUUDeCAAXr7mIP+S9Fb8T6TOZ3UNywkcCR1E4aRRXWoQEo5fWxS8jtwsiIkve3F9m9 9YTOuiXKZV+NMGX89cxGmRcF4+5JIDogk0KCe3nY4p//Y4ZrxSB2bar1tl3kWu6a97XFMv +mUp3a3vVhuSgIQpH/NDIntKGSlN9Jquas5OpREHswnFKVdL8aElPX+MrYEhVVxNrE9weN 9rp/98lcVRxt0uBbrsqwfNzyQcdXAQ8ekCkreR0jfPhl8SaKIl1Soz+3U5S6SA== X-Mailman-Original-DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1683280310; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=erVi4LQ4PMq8WdS9Oke29YWNFu7kXhpRXvXBuGq1YUw=; b=ZPLDjDhuin793Om4wmpTCQRzbHkc3yuHHsF73c3M4IlB8fB860DHRgRTCsAa9EXDlJGe4c V8CkW93ETS1X80DA== X-Mailman-Original-Authentication-Results: smtp2.osuosl.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.a=rsa-sha256 header.s=2020 header.b=Kwv0H+NF; dkim=pass header.d=linutronix.de header.i=@linutronix.de header.a=ed25519-sha256 header.s=2020e header.b=ZPLDjDhu Subject: Re: [Intel-wired-lan] [PATCH iwl v1 4/5] igc: Retrieve TX timestamp during interrupt handling X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: vladimir.oltean@nxp.com, anthony.l.nguyen@intel.com Content-Type: multipart/mixed; boundary="===============8285769900543162980==" Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" --===============8285769900543162980== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha512; protocol="application/pgp-signature" --=-=-= Content-Type: text/plain On Thu May 04 2023, Vinicius Costa Gomes wrote: > When the interrupt is handled, the TXTT_0 bit in the TSYNCTXCTL > register should already be set and the timestamp value already loaded > in the appropriate register. > > This simplifies the handling, and reduces the latency for retrieving > the TX timestamp, which increase the amount of TX timestamps that can > be handled in a given time period. > > Signed-off-by: Vinicius Costa Gomes Reviewed-by: Kurt Kanzenbach --=-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQJHBAEBCgAxFiEEvLm/ssjDfdPf21mSwZPR8qpGc4IFAmRU0bUTHGt1cnRAbGlu dXRyb25peC5kZQAKCRDBk9HyqkZzgrmLD/44sxaJ1dDTyILJut1aAmqlVaeOEuxn vyGxseBQADJUwdXN1xN623y9l3eQrU50K0wI8qMZKR8HnT8z1mB+meVTqft9Bmj2 Ku9lTahlYhVQvRpE9xkq/Ekkhv3hpO156upUvHft9YhbzOGTwpchZVcxrRbQg+lj znSKYSb4tMRNv4djWyz2qQH08uWQiM/5XgzM8IqT0U2VPwOPLA+mKtGAXxjvdQ0j hkX0V8rysSlffdw76Wq0zIHLx/aMhRzkmCkJBRd4wPSs2Dkcm2lwb6wCQ12Vlwsv rpyBsFGISWP8MhIuqH1HiwHQKOU83YpxvcJrpC84946bSySmbLF0Vr5zTOETnDdP hxPQUjL5OhIffR0VhOzrYibe4tKW24LtTE9PgQnkr6wMJoWlSPiF+L1bCxmnW+nI FKQqMVAl7Hu0ysBRgwRJtizJmQWdaelBpfHHruVyROzf0ZjlfVOirXybmtWxBMHG YfsMc0k7ZaJtdeXonEZWBQ4Oj/jc0FUSh7MrJEotVgfIpH7mAVubEcqVY90zwFO7 FikN4F5lrn5MaKXGM0MpL9aR8ZCVCA7flW8GB+WYVsp1zxWjeGLLwjOAMKa2Nac/ WP77YT9X7zbwyrk+8eNENEz40bq2coXJN3CzLpzuUT0VVbX4wLxlnRzPu1sVx+Du PM8wJyId+BY/Uw== =c0wp -----END PGP SIGNATURE----- --=-=-=-- --===============8285769900543162980== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan --===============8285769900543162980==--