From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48CBAC4167B for ; Wed, 30 Nov 2022 01:17:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E5EA010E093; Wed, 30 Nov 2022 01:17:25 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 536A210E093 for ; Wed, 30 Nov 2022 01:17:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669771041; x=1701307041; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=asLTVSfQgL/eQgC61on2MTwKRA6vHSw6q7bzQZPQ1KI=; b=i2/apxnCGHmowSsercXCtDhb3d+9B5TDt6dOn4qYXpOsmSOH9kJjgddH RnFRCZPwQYapu6+6dOqO9PT1NGtnBlUN8FVP+EQ4G2DyS6zI1y50O0KVh dxXINLz/YMwJ8dDjkfTZGDr3EUGiAWAxRxjNp8f1HTZqENVxLs0XonM+H gpvxmbyIXb7Q1RHD5JcLefanQ1gpkRMSXWDL4D+A6+pRibCR55U/Ft572 LrZAyLbQSB9VG0EgZ9q2sT0bXL9ywaIHfvge0WojYjIw54I7j5c2LZBuz RFLOrzCZCOgKwN55zPVO4D5j8U5ZYQ3QPMPXokSa6B2zVMuxDPpvNikc6 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="294967195" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="294967195" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 17:17:20 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="621688834" X-IronPort-AV: E=Sophos;i="5.96,204,1665471600"; d="scan'208";a="621688834" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.209.22.21]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 17:17:20 -0800 Date: Tue, 29 Nov 2022 17:17:13 -0800 Message-ID: <877czd44x2.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Umesh Nerlige Ramappa In-Reply-To: <20221129012146.995006-1-umesh.nerlige.ramappa@intel.com> References: <20221129012146.995006-1-umesh.nerlige.ramappa@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add support for 32 bit OAG formats in MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 28 Nov 2022 17:21:46 -0800, Umesh Nerlige Ramappa wrote: > Hi Umesh, Overall looks ok, just a couple of questions below. Splitting the patches would be nice and easier to review, but I'm almost done with this one ;-) > @@ -1876,7 +1875,13 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) > MI_PREDICATE_RESULT_2_ENGINE(base) : > MI_PREDICATE_RESULT_1(RENDER_RING_BASE); > > - bo = i915_gem_object_create_internal(i915, 4096); > + /* > + * gt->scratch was being used to save/restore the GPR registers, but on > + * MTL the scratch uses stolen lmem. An MI_SRM to this memory region > + * causes an engine hang. Instead allocate an additional page here to > + * save/restore GPR registers > + */ > + bo = i915_gem_object_create_internal(i915, 8192); Do we know how much space was used in stream->noa_wait originally? Anyway allocating an additional page is not an issue so ok to skip the question. > @@ -4746,6 +4772,7 @@ static void oa_init_supported_formats(struct i915_perf *perf) > break; > > case INTEL_DG2: > + case INTEL_METEORLAKE: > oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8); > oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8); Do these formats also need to be added? oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8); oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8); oa_format_add(perf, I915_OAR_FORMAT_A36u64_B8_C8); oa_format_add(perf, I915_OA_FORMAT_A38u64_R2u64_B8_C8); Or these are not considered OAG formats? > break; Thanks. -- Ashutosh