Re: [PATCH v2 2/2] tests/tcg/ppc64le: tests for brh/brw/brd

[Fabiano Rosas <farosas@linux.ibm.com>]

matheus.ferst@eldorado.org.br writes:

> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
>
> Tests for Byte-Reverse Halfword, Word and Doubleword
>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>

Tested in x86_64 with the new container image.

Tested-by: Fabiano Rosas <farosas@linux.ibm.com>

> ---
>  tests/tcg/ppc64/Makefile.target   |  7 +++++++
>  tests/tcg/ppc64le/Makefile.target |  7 +++++++
>  tests/tcg/ppc64le/byte_reverse.c  | 21 +++++++++++++++++++++
>  3 files changed, 35 insertions(+)
>  create mode 100644 tests/tcg/ppc64le/byte_reverse.c
>
> diff --git a/tests/tcg/ppc64/Makefile.target b/tests/tcg/ppc64/Makefile.target
> index 0c6a4585fc..55c690c8ad 100644
> --- a/tests/tcg/ppc64/Makefile.target
> +++ b/tests/tcg/ppc64/Makefile.target
> @@ -10,4 +10,11 @@ PPC64_TESTS=bcdsub
>  endif
>  bcdsub: CFLAGS += -mpower8-vector
>  
> +ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER10),)
> +POWER10_TESTS=byte_reverse
> +RUN_POWER10_TESTS=$(patsubst %, run-%, $(POWER10_TESTS))
> +$(RUN_POWER10_TESTS): QEMU_OPTS+=-cpu POWER10
> +PPC64_TESTS += $(POWER10_TESTS)
> +endif
> +
>  TESTS += $(PPC64_TESTS)
> diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makefile.target
> index 1acfcff94a..517d290b1a 100644
> --- a/tests/tcg/ppc64le/Makefile.target
> +++ b/tests/tcg/ppc64le/Makefile.target
> @@ -9,4 +9,11 @@ PPC64LE_TESTS=bcdsub
>  endif
>  bcdsub: CFLAGS += -mpower8-vector
>  
> +ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER10),)
> +POWER10_TESTS=byte_reverse
> +RUN_POWER10_TESTS=$(patsubst %, run-%, $(POWER10_TESTS))
> +$(RUN_POWER10_TESTS): QEMU_OPTS+=-cpu POWER10
> +PPC64LE_TESTS += $(POWER10_TESTS)
> +endif
> +
>  TESTS += $(PPC64LE_TESTS)
> diff --git a/tests/tcg/ppc64le/byte_reverse.c b/tests/tcg/ppc64le/byte_reverse.c
> new file mode 100644
> index 0000000000..53b76fc2e2
> --- /dev/null
> +++ b/tests/tcg/ppc64le/byte_reverse.c
> @@ -0,0 +1,21 @@
> +#include <assert.h>
> +
> +int main(void)
> +{
> +    unsigned long var;
> +
> +    var = 0xFEDCBA9876543210;
> +    asm("brh %0, %0" : "+r"(var));
> +    assert(var == 0xDCFE98BA54761032);
> +
> +    var = 0xFEDCBA9876543210;
> +    asm("brw %0, %0" : "+r"(var));
> +    assert(var == 0x98BADCFE10325476);
> +
> +    var = 0xFEDCBA9876543210;
> +    asm("brd %0, %0" : "+r"(var));
> +    assert(var == 0x1032547698BADCFE);
> +
> +    return 0;
> +}
> +