From mboxrd@z Thu Jan 1 00:00:00 1970 From: Francisco Jerez Subject: Re: [PATCH v3 2/2] drm/i915/tgl: MOCS table update Date: Tue, 12 Nov 2019 15:20:03 -0800 Message-ID: <877e44znq4.fsf@riseup.net> References: <20191112224757.25116-1-matthew.d.roper@intel.com> <20191112224757.25116-2-matthew.d.roper@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1270674464==" Return-path: Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) by gabe.freedesktop.org (Postfix) with ESMTPS id 233EA89CB9 for ; Tue, 12 Nov 2019 23:19:31 +0000 (UTC) In-Reply-To: <20191112224757.25116-2-matthew.d.roper@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Matt Roper , intel-gfx@lists.freedesktop.org Cc: Lucas De Marchi List-Id: intel-gfx@lists.freedesktop.org --===============1270674464== Content-Type: multipart/signed; boundary="==-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" --==-=-= Content-Type: multipart/mixed; boundary="=-=-=" --=-=-= Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Matt Roper writes: > The bspec was just updated with a minor correction to entry 61 (it > shouldn't have had the SCF bit set). > > v2: > - Add a MOCS_ENTRY_UNUSED() and use it to declare the > explicitly-reserved MOCS entries. (Lucas) > - Move the warning suppression from the Makefile to a #pragma that only > affects the TGL table. (Lucas) > > v3: > - Entries 16 and 17 are identical to ICL now, so no need to explicitly > adjust them (or mess with compiler warning overrides). > > Bspec: 45101 > Fixes: 2ddf992179c4 ("drm/i915/tgl: Define MOCS entries for Tigerlake") > Cc: Tomasz Lis > Cc: Lucas De Marchi > Cc: Francisco Jerez > Cc: Jon Bloomfield > Signed-off-by: Matt Roper Reviewed-by: Francisco Jerez > --- > drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/= gt/intel_mocs.c > index 06e2adbf27be..2b977991b785 100644 > --- a/drivers/gpu/drm/i915/gt/intel_mocs.c > +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c > @@ -263,7 +263,7 @@ static const struct drm_i915_mocs_entry tigerlake_moc= s_table[] =3D { > L3_1_UC), > /* HW Special Case (Displayable) */ > MOCS_ENTRY(61, > - LE_1_UC | LE_TC_1_LLC | LE_SCF(1), > + LE_1_UC | LE_TC_1_LLC, > L3_3_WB), > }; >=20=20 > --=20 > 2.21.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx --=-=-=-- --==-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHQEAREIAB0WIQST8OekYz69PM20/4aDmTidfVK/WwUCXcs+IwAKCRCDmTidfVK/ W+R0AP9F+MEUdw0NwDSTEVrZtjtvu29Kx31xpCe4ncHqZZf4rwD3f1p1Ar1KN0/H P2IzphO6OOCC0PlB4negz00871wdKg== =xOHm -----END PGP SIGNATURE----- --==-=-=-- --===============1270674464== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4 --===============1270674464==-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B2E0C43331 for ; Tue, 12 Nov 2019 23:19:32 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7768021872 for ; Tue, 12 Nov 2019 23:19:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7768021872 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=riseup.net Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ED2FE89CB9; Tue, 12 Nov 2019 23:19:31 +0000 (UTC) Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) by gabe.freedesktop.org (Postfix) with ESMTPS id 233EA89CB9 for ; Tue, 12 Nov 2019 23:19:31 +0000 (UTC) Received: from bell.riseup.net (bell-pn.riseup.net [10.0.1.178]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (Client CN "*.riseup.net", Issuer "Sectigo RSA Domain Validation Secure Server CA" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 47CNxG5tl8zDyb4; Tue, 12 Nov 2019 15:19:30 -0800 (PST) X-Riseup-User-ID: 40813EED2DEAFAAE2E79D5C49CCDCD08ED5B927E8BA602649D72214BB1C15195 Received: from [127.0.0.1] (localhost [127.0.0.1]) by bell.riseup.net (Postfix) with ESMTPSA id 47CNxG4j7KzJsYv; Tue, 12 Nov 2019 15:19:30 -0800 (PST) From: Francisco Jerez To: Matt Roper , intel-gfx@lists.freedesktop.org In-Reply-To: <20191112224757.25116-2-matthew.d.roper@intel.com> References: <20191112224757.25116-1-matthew.d.roper@intel.com> <20191112224757.25116-2-matthew.d.roper@intel.com> Date: Tue, 12 Nov 2019 15:20:03 -0800 Message-ID: <877e44znq4.fsf@riseup.net> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1573600770; bh=yDYHqA4cRPGHRervZqREu7r/SPvELsTjzxYfiQ5BlAc=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=TqUB12yDDqdP+DB79xJJ/V8BZ8b2ifrERg120yzWflflicbm/HQS5ugZjYSYbnnhM KdtpV68uGMOMv669u1gH2VTRS/cN36oqBnxzVR2zNhNIv+zEldBVeYaOXa3iqhPOZa qipr6rKHz7tE2XNf6g4d/stLiN7oZFXwOb93BaE0= Subject: Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/tgl: MOCS table update X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi Content-Type: multipart/mixed; boundary="===============1270674464==" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Message-ID: <20191112232003.6_Pcpzky5KG1CnVnxRGlrngLfCOARyb_LinFAPbdkp8@z> --===============1270674464== Content-Type: multipart/signed; boundary="==-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" --==-=-= Content-Type: multipart/mixed; boundary="=-=-=" --=-=-= Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Matt Roper writes: > The bspec was just updated with a minor correction to entry 61 (it > shouldn't have had the SCF bit set). > > v2: > - Add a MOCS_ENTRY_UNUSED() and use it to declare the > explicitly-reserved MOCS entries. (Lucas) > - Move the warning suppression from the Makefile to a #pragma that only > affects the TGL table. (Lucas) > > v3: > - Entries 16 and 17 are identical to ICL now, so no need to explicitly > adjust them (or mess with compiler warning overrides). > > Bspec: 45101 > Fixes: 2ddf992179c4 ("drm/i915/tgl: Define MOCS entries for Tigerlake") > Cc: Tomasz Lis > Cc: Lucas De Marchi > Cc: Francisco Jerez > Cc: Jon Bloomfield > Signed-off-by: Matt Roper Reviewed-by: Francisco Jerez > --- > drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/= gt/intel_mocs.c > index 06e2adbf27be..2b977991b785 100644 > --- a/drivers/gpu/drm/i915/gt/intel_mocs.c > +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c > @@ -263,7 +263,7 @@ static const struct drm_i915_mocs_entry tigerlake_moc= s_table[] =3D { > L3_1_UC), > /* HW Special Case (Displayable) */ > MOCS_ENTRY(61, > - LE_1_UC | LE_TC_1_LLC | LE_SCF(1), > + LE_1_UC | LE_TC_1_LLC, > L3_3_WB), > }; >=20=20 > --=20 > 2.21.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx --=-=-=-- --==-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHQEAREIAB0WIQST8OekYz69PM20/4aDmTidfVK/WwUCXcs+IwAKCRCDmTidfVK/ W+R0AP9F+MEUdw0NwDSTEVrZtjtvu29Kx31xpCe4ncHqZZf4rwD3f1p1Ar1KN0/H P2IzphO6OOCC0PlB4negz00871wdKg== =xOHm -----END PGP SIGNATURE----- --==-=-=-- --===============1270674464== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4 --===============1270674464==--